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| 型號： | MPC8264AZUPJDB |
| 廠商： | Freescale Semiconductor |
| 文件頁數(shù)： | 48/50頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC MPU POWERQUICC II 480-TBGA |
| 標(biāo)準(zhǔn)包裝： | 21 |
| 系列： | MPC82xx |
| 處理器類型： | 32-位 MPC82xx PowerQUICC II |
| 速度： | 300MHz |
| 電壓： | 2V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 480-LBGA |
| 供應(yīng)商設(shè)備封裝： | 408-TBGA（37.5x37.5） |
| 包裝： | 托盤 |
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MPC8260A PowerQUICC II Integrated Communications Processor Hardware Specifications, Rev. 2.0
Freescale Semiconductor
7
Electrical and Thermal Characteristics
— Hot-Swap friendly (supports the Hot Swap Specification as defined by PICMG 2.1 R1.0
August 3, 1998)
— Support for 66 MHz, 3.3 V specification
— 60x-PCI bus core logic which uses a buffer pool to allocate buffers for each port
— Makes use of the local bus signals, so there is no need for additional pins
2
Electrical and Thermal Characteristics
This section provides AC and DC electrical specifications and thermal characteristics for the MPC826xA.
2.1
DC Electrical Characteristics
This section describes the DC electrical characteristics for the MPC826xA. Table 1 shows the maximum
electrical ratings.
Table 1. Absolute Maximum Ratings1
1 Absolute maximum ratings are stress ratings only; functional operation (see Table 2) at the maximums is not
guaranteed. Stress beyond those listed may affect device reliability or cause permanent damage.
Rating
Symbol
Value
Unit
Core supply voltage2
2 Caution: VDD/VCCSYN must not exceed VDDH by more than 0.4 V at any time, including during power-on reset.
VDD
–0.3 – 2.5
V
PLL supply voltage2
VCCSYN
–0.3 – 2.5
V
I/O supply voltage3
3 Caution: VDDH can exceed VDD/VCCSYN by 3.3 V during power on reset by no more than 100 mSec. VDDH should
not exceed VDD/VCCSYN by more than 2.5 V during normal operation.
VDDH
–0.3 – 4.0
V
Input voltage4
4 Caution: VIN must not exceed VDDH by more than 2.5 V at any time, including during power-on reset.
VIN
GND(–0.3) – 3.6
V
Junction temperature
Tj
120
°C
Storage temperature range
TSTG
(–55) – (+150)
°C
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