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參數(shù)資料
| 型號(hào)： | MPC8260CZUFFBB3 |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, 133 MHz, RISC PROCESSOR, PBGA480 |
| 封裝： | 37.50 X 37.50 MM, 1.55 MM HEIGHT, 1.27 MM PITCH, TBGA-480 |
| 文件頁數(shù)： | 21/48頁 |
| 文件大小： | 688K |
| 代理商： | MPC8260CZUFFBB3 |
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MPC826xA (HiP4) Family Hardware Specications
MOTOROLA
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
Pinout
1.4
Pinout
This section provides the pin assignments and pinout list for the MPC826xA.
1.4.1
Pin Assignments
Figure 12 shows the pinout of the MPC826xA’s 480 TBGA package as viewed from the top surface.
1100_0007
66/33MHz
2/4
133MHz
Bypass
66MHz
2
66 MHz
1100_0017
66/33MHz
3/6
200MHz
Bypass
80MHz
2.5
80 MHz
1100_0107
66/33MHz
3/6
200MHz
Bypass
66MHz
3
66 MHz
1 The user should verify that all buses and functions run frequencies that are within the supported ranges.
2 The frequency depends on the value of PCI_MODCK. If PCI_MODCK is high (logic ‘1’), the PCI frequency
is divided by 2 (33 instead of 66 MHz, etc.) and the CPM multiplication factor is multiplied by 2.
3 66 MHz congurations are required for input clock frequencies higher than 50 MHz;
33 MHz congurations are required for input clock frequencies below 50 MHz.
4 Core frequency = (60x bus frequency)(core multiplication factor)
5 Bus frequency = CPM frequency / bus division factor
6 In this mode, PCI_MODCK must be “1”.
7 In this mode the Core PLL is bypassed (core frequency equals bus frequency; for debug purpose only).
Table 19. Clock Conguration Modes in PCI Agent Mode (Continued)1
MODCK_H –
MODCK[1–3]
Input Clock
Frequency
(PCI)2,3
CPM
Multiplication
Factor2
CPM
Frequency
Core
Multiplication
Factor
Core
Frequency4
Bus Division
Factor
60x Bus
Frequency5
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