參數(shù)資料
型號(hào)： MPC7457
廠(chǎng)商： 飛思卡爾半導(dǎo)體(中國(guó))有限公司
英文描述： RISC Microprocessor Hardware Specifications
中文描述： RISC微處理器硬件規(guī)格
文件頁(yè)數(shù)： 13/68頁(yè)
文件大小： 1755K
代理商： MPC7457
MPC7457 RISC Microprocessor Hardware Specifications, Rev. 5
Freescale Semiconductor
13
Electrical and Thermal Characteristics
Table 5
provides the package thermal characteristics for the MPC7457.
Table 5. Package Thermal Characteristics
1
Table 6
provides the DC electrical characteristics for the MPC7457.
Characteristic
Symbol
Value
Unit
Notes
MPC7447
MPC7457
Junction-to-ambient thermal resistance, natural convection
R
θ
JA
22
20
°C/W
2, 3
Junction-to-ambient thermal resistance, natural convection,
four-layer (2s2p) board
R
θ
JMA
14
14
°C/W
2, 4
Junction-to-ambient thermal resistance, 200 ft/min airflow,
single-layer (1s) board
R
θ
JMA
16
15
°C/W
2, 4
Junction-to-ambient thermal resistance, 200 ft/min airflow,
four-layer (2s2p) board
R
θ
JMA
11
11
°C/W
2, 4
Junction-to-board thermal resistance
R
θ
JB
6
6
°C/W
5
Junction-to-case thermal resistance
R
θ
JC
<0.1
<0.1
°C/W
6
Coefficient of thermal expansion
6.8
6.8
ppm/°C
Notes
:
1. Refer to
Section 9.8, “Thermal Management Information,”
for more details about thermal management.
2. Junction temperature is a function of on-chip power dissipation, package thermal resistance, mounting site (board)
temperature, ambient temperature, airflow, power dissipation of other components on the board, and board thermal
resistance.
3. Per SEMI G38-87 and JEDEC JESD51-2 with the single-layer board horizontal.
4. Per JEDEC JESD51-6 with the board horizontal.
5. Thermal resistance between the die and the printed-circuit board per JEDEC JESD51-8. Board temperature is measured
on the top surface of the board near the package.
6. Thermal resistance between the die and the case top surface as measured by the cold plate method (MIL SPEC-883 Method
1012.1) with the calculated case temperature. The actual value of R
θ
JC
for the part is less than 0.1°C/W.
Table 6. DC Electrical Specifications
At recommended operating conditions. See
Table 4
.
Characteristic
Nominal
Bus
Voltage
1
Symbol
Min
Max
Unit
Notes
Input high voltage
(all inputs including SYSCLK)
1.5
V
IH
GV
DD
×
0.65
GV
DD
+ 0.3
V
2
1.8
OV
DD
/GV
DD
×
0.65
OV
DD
/GV
DD
+ 0.3
V
2.5
1.7
OV
DD
/GV
DD
+ 0.3
V
Input low voltage
(all inputs including SYSCLK)
1.5
V
IL
–0.3
GV
DD
×
0.35
V
2, 6
1.8
–0.3
OV
DD
/GV
DD
×
0.35
V
2.5
–0.3
0.7
V
Input leakage current, V
in
= GV
DD
/OV
DD
—
I
in
—
30
μA
2, 3
High-impedance (off-state) leakage
current, V
in
= GV
DD
/OV
DD
—
I
TSI
—
30
μA
2, 3, 4
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