
QADC64E Legacy Mode Operation
MPC561/MPC563 Reference Manual, Rev. 1.2
Freescale Semiconductor
13-49
NOTE
The guideline for selecting PSH and PSL is select is to maintain
approximately 50% duty cycle. So for prescaler values less then 16, or PSH
~= PSL. For prescaler values greater than 16 keep PSL as large as possible.
Figure 13-24 shows that the prescaler is essentially a variable pulse width signal generator. A 5-bit down
counter, clocked at the IMB3 clock rate, is used to create both the high phase and the low phase of the
QCLK signal. At the beginning of the high phase, the 5-bit counter is loaded with the 5-bit PSH value.
When the zero detector finds that the high phase is finished, the QCLK is reset. A 3-bit comparator looks
for a one’s complement match with the 3-bit PSL value, which is the end of the low phase of the QCLK.
The PSA bit was maintained for software compatibility, but has no effect on QADC64E.
The following equations define QCLK frequency:
High QCLK Time = (PSH + 1) ÷ fSYS
Low QCLK Time = (PSL + 1) ÷ fSYS
FQCLK= 1 ÷ (High QCLK Time + Low QCLK Time)
Where:
PSH = 0 to 31, the prescaler QCLK high cycles in QACR0
PSL = 0 to 7, the prescaler QCLK low cycles in QACR0
fSYS = IMB3 clock frequency
FQCLK = QCLK frequency
The following are equations for calculating the QCLK high/low phases in Example 1:
High QCLK Time = (19 + 1)
÷ 56 x 106 = 357 ns
Low QCLK Time = (7 + 1)
÷ 56 x 106 = 143 ns
FQCLK = 1/(357 + 143) = 2 MHz
The following are equations for calculating the QCLK high/low phases in Example 2:
High QCLK Time = (11 + 1) ÷ 40 x 10
6 = 300 ns
Low QCLK Time = (7 + 1) ÷ 40 x 10
6 = 200 ns
FQCLK = 1/(300 + 200) = 2 MHz
The following are equations for calculating the QCLK high/low phases in Example 3:
High QCLK Time = (7 + 1) ÷ 32 x 10
6 = 250 ns
Low QCLK Time = (7 + 1) ÷ 32 x 10
6 = 250 ns
FQCLK = 1/(250 + 250) = 2 MHz
conversion times based on the following assumption:
Input sample time is as fast as possible (IST = 0, 2 QCLK cycles).
For other MCU IMB3 clock frequencies and other input sample times, the same calculations can be made.