Table 27 EQADC SSI Timing Charact" />
參數(shù)資料
型號: MPC5567EVBE
廠商: Freescale Semiconductor
文件頁數(shù): 63/68頁
文件大?。?/td> 0K
描述: BOARD EVALUATION MPC5567
標(biāo)準(zhǔn)包裝: 1
類型: MCU
適用于相關(guān)產(chǎn)品: MPC5567MZP132
所含物品: 板,線纜,CD,ICD,電源
MPC5567 Microcontroller Data Sheet, Rev. 2
Revision History for the MPC5567 Data Sheet
Freescale Semiconductor
66
Table 27 EQADC SSI Timing Characteristics:
Deleted from table title ‘(Pads at 3.3 V or 5.0 V)’
Deleted 1st line in table ‘CLOAD = 25 pF on all outputs. Pad drive strength set to maximum.’
Spec 1: FCK frequency -- removed.
Combined footnotes 1 and 2, and moved the new footnote to Spec 2. Moved old footnote 3 that is now
footnote 2 to Spec 2.
Footnote 1, deleted ‘VDD = 1.35–1.65 V’ and ‘VDD33 and VDDSYN = 3.0–3.6V.’
Changed ‘CL = 50 pF’ to ‘CL = 25 pF.’
Footnote 2: added ‘cycle’ after ‘duty’ to read: FCK duty cycle is not 50% when . . . .
Figure 32 MPC5567 324 Package: Deleted the version number and date; changed ball label T21 from VRCVSS to PLLCFG2.
Figure 36 and Figure 36MPC5567 416 Package: Deleted the version number and date.
Table 35. Table and Figure Changes Between Rev. 0.0 and 1.0 (continued)
Location
Description of Changes
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