參數(shù)資料
型號(hào): MPC2105ASG66
廠商: MOTOROLA INC
元件分類: DRAM
英文描述: 512KB and 1MB BurstRAM Secondary Cache Modules for PowerPC PReP/CHRP Platforms
中文描述: 64K X 72 CACHE TAG SRAM MODULE, 9 ns, DMA178
文件頁(yè)數(shù): 3/24頁(yè)
文件大?。?/td> 228K
代理商: MPC2105ASG66
MPC2104
MPC2105
MPC2106
MPC2107
3
MOTOROLA FAST SRAM
MPC2104/MPC2105 BLOCK DIAGRAM
MCM67Mx18
A15
K
G
E
TSP
DQ0 – DQ8
DQ9 – DQ17
A13
ADS0
STANDBY
TSC
BAA
COE0
A14 – A26
A2 – A12
VCC5 via 100
A2 – A14
A14 – A26
LW
UW
CWE0
CWE1
A1
TCLR
TWE
CLK2
MATCH
DIRTYOUT
VALIDIN
DIRTYIN
TOE
TAG: 16K x 12 + V + D
A13
A0 – A12
TDQ0 – TDQ10
TDQ11
RESET
SW
TW
K
VALIDD
DIRTYD
TG
TAG, TAD, E2
TAH, PWRDN
SFUNC, SG
MATCH
DIRTYQ
CLK3
CLK4
ALE
ADS1
CNTEN1
COE1
ADDR0
ADDR1
PD2
PD3
= NC
= NC
= NC
= NC
= NC
= NC
= NC
= NC
= NC
J0
X24C00
(OPTIONAL)
SCL
SDA
PD0/IDSCLK
PD1/IDSDATA
J2
J3
CLK0
DH0 – DH7 + DP0
DH8 – DH15 + DP1
CNTEN0
A1
A27
A0
A28
MCM67Mx18
A15
K
G
E
TSP
DQ0 – DQ8
DQ9 – DQ17
TSC
BAA
A2 – A14
LW
UW
CWE2
CWE3
CLK0
DH16 – DH23 + DP2
DH24 – DH31 + DP3
A1
A0
MCM67Mx18
A15
K
G
E
TSP
DQ0 – DQ8
DQ9 – DQ17
TSC
BAA
A2 – A14
LW
UW
CWE4
CWE5
CLK1
DL0 – DL7 + DP4
DL8 – DL15 + DP5
A1
A0
MCM67Mx18
A15
K
G
E
TSP
DQ0 – DQ8
DQ9 – DQ17
TSC
BAA
A2 – A14
LW
UW
CWE6
CWE7
CLK1
DL16 – DL23 + DP6
DL24 – DL31 + DP7
A1
A0
’244
TT1, WTD, E1
J5
VSS
VCC5 via 100
WTQ
VALIDQ
VCCQ
VCC3
NC
NC
256KB
512KB
EEPROM
256KB
no stuff
no stuff
no stuff
no stuff
0
no stuff
EEPROM
512KB
0
no stuff
no stuff
no stuff
no stuff
0
J5
J4
J3
J2
J1
J0
no stuff
0
0
0
0
no stuff
0
0
0
no stuff
no stuff
0
J4
J1
Note: MPC2104 utilizes 32K x 18 BurstRAMs. MPC2105 utilizes 64K x 18 BurstRAMs.
相關(guān)PDF資料
PDF描述
MPC2105SG66 256KB and 512KB BurstRAM Secondary Cache Modules for PowerPC PReP/CHRP Platforms
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MPC2105C 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:512KB and 1MB BurstRAM Secondary Cache Modules for PowerPC PReP/CHRP Platforms
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MPC2105PDG66 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:256KB/512KB BurstRAM Secondary Cache Modules for PowerPC PReP/CHRP Platforms
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