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| 型號： | MPC184VFB |
| 廠商： | Freescale Semiconductor |
| 文件頁數(shù)： | 9/12頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC SECURITY PROCESSOR 252-PBGA |
| 標(biāo)準(zhǔn)包裝： | 60 |
| 處理器類型： | MPC1xx PowerPC ISA PCI 橋/存儲器 |
| 速度： | 66MHz |
| 電壓： | 1.5V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 252-BGA |
| 供應(yīng)商設(shè)備封裝： | 252-MAPBGA（21x21） |
| 包裝： | 托盤 |
6
MPC184 Security Processor Technical Summary
MOTOROLA
6.2 The MPC184 Controller
The MPC184 controller manages on-chip resources, including individual execution units (EUs), FIFOs, the
EBI, and the internal buses that connect all the various modules. The controller receives service requests
from the EBI and various crypto-channels, and schedules the required activities. The controller can
congure each of the on-chip resources in three modes:
Host-controlled mode—The host is directly responsible for all data movement into and out of the
resource.
Static mode—The user can reserve a specic execution unit to a specic crypto-channel.
Dynamic mode—A crypto channel can request a particular service from any available execution
unit.
6.3 Host-Managed Register Access
All EUs can be used entirely through register read/write access. It is strongly recommended that read/write
access only be performed on a EU that is statically assigned to an idle crypto-channel. Such an assignment
is the only method for the host to inform the controller that a particular EU is in use.
6.4 Static EU Access
The Controller can be congured to reserve one or more EUs to a particular crypto-channel. Doing so
permits locking the EU to a particular context. When in this mode, the crypto-channel can be used by
multiple descriptors representing the same context without unloading and reloading the context at the end
of each descriptor. This mode presents considerable performance improvement over dynamic access, but
only when the MPC184 is supporting a single context (or a single session is being streamed.)
6.5 Dynamic EU Access
Processing begins when a data packet descriptor pointer is written to the next descriptor pointer register of
one of the crypto-channels. Prior to fetching the data referred to by the descriptor and based on the services
requested by the descriptor header in the descriptor buffer, the controller dynamically reserves usage of an
EU to the crypto-channel. If all appropriate EUs are already dynamically reserved by other crypto-channels,
the crypto-channel stalls and waits to fetch data until the appropriate EU is available.
If multiple crypto-channels simultaneously request the same EU, the EU is assigned on a round-robin basis.
Once the required EU has been reserved, the crypto-channel fetches and loads the appropriate data packets,
operates the EU, unloads data to system memory, and releases the EU for use by another crypto-channel. If
a crypto-channel attempts to reserve a statically-assigned EU (and no appropriate EUs are available for
dynamic assignment), an interrupt is generated and status indicates illegal access. When dynamic
assignment is used, each encryption/decryption packet must contain context that is particular to the context
being supported.
6.6 Crypto-Channels
The MPC184 includes four crypto-channels that manage data and EU function. Each crypto-channel
consists of the following:
Control registers containing information about the transaction in process
A status register containing an indication of the last unfullled bus request
A pointer register indicating the location of a new descriptor to fetch
Buffer memory used to store the active data packet descriptor
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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