參數(shù)資料
型號(hào): MP80C51C-36D
廠商: ATMEL CORP
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 36 MHz, MICROCONTROLLER, PDIP40
封裝: PLASTIC, DIP-40
文件頁(yè)數(shù): 87/143頁(yè)
文件大?。?/td> 4602K
代理商: MP80C51C-36D
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48
XMEGA A3BU [DATASHEET]
8362F–AVR–02/2013
29.
ADC – 12-bit Analog to Digital Converter
29.1
Features
Two Analog to Digital Converters (ADCs)
12-bit resolution
Up to two million samples per second
Two inputs can be sampled simultaneously using ADC and 1x gain stage
Four inputs can be sampled within 1.5s
Down to 2.5s conversion time with 8-bit resolution
Down to 3.5s conversion time with 12-bit resolution
Differential and single-ended input
Up to 16 single-ended inputs
16x4 differential inputs without gain
8x4 differential input with gain
Built-in differential gain stage
1/2
x, 1x, 2x, 4x, 8x, 16x, 32x, and 64x gain options
Single, continuous and scan conversion options
Four internal inputs
Internal temperature sensor
DAC output
VCC voltage divided by 10
1.1V bandgap voltage
Four conversion channels with individual input control and result registers
Enable four parallel configurations and results
Internal and external reference options
Compare function for accurate monitoring of user defined thresholds
Optional event triggered conversion for accurate timing
Optional DMA transfer of conversion results
Optional interrupt/event on compare result
29.2
Overview
The ADC converts analog signals to digital values. The ADC has 12-bit resolution and is capable of converting up to two
million samples per second (msps). The input selection is flexible, and both single-ended and differential measurements
can be done. For differential measurements, an optional gain stage is available to increase the dynamic range. In
addition, several internal signal inputs are available. The ADC can provide both signed and unsigned results.
This is a pipelined ADC that consists of several consecutive stages. The pipelined design allows a high sample rate at a
low system clock frequency. It also means that a new input can be sampled and a new ADC conversion started while
other ADC conversions are still ongoing. This removes dependencies between sample rate and propagation delay.
The ADC has four conversion channels (0-3) with individual input selection, result registers, and conversion start control.
The ADC can then keep and use four parallel configurations and results, and this will ease use for applications with high
data throughput or for multiple modules using the ADC independently. It is possible to use DMA to move ADC results
directly to memory or peripherals when conversions are done.
Both internal and external reference voltages can be used. An integrated temperature sensor is available for use with the
ADC. The output from the DAC, VCC/10 and the bandgap voltage can also be measured by the ADC.
The ADC has a compare function for accurate monitoring of user defined thresholds with minimum software intervention
required.
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