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參數(shù)資料
| 型號： | MP80C51C-36D |
| 廠商： | ATMEL CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 36 MHz, MICROCONTROLLER, PDIP40 |
| 封裝： | PLASTIC, DIP-40 |
| 文件頁數(shù)： | 40/143頁 |
| 文件大?。?/td> | 4602K |
| 代理商： | MP80C51C-36D |
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134
XMEGA A3BU [DATASHEET]
8362F–AVR–02/2013
None, use the ADC in signed mode also for single ended conversions.
2.
ADC increased noise when using internal 1.0V reference at low temperature
When operating at -40
C and using internal 1.0V reference the RMS noise will be up 4LSB.
Problem fix/Workaround
Use averaging tof multiple samples to remove noise.
3.
DAC offset calibration range too small when using AVCC as reference
If using AVCC as reference, the DAC offset calibration will not totally remove the offset error. Offset could be up to
100LSB after calibration.
Problem fix/Workaround
Offset adjustment must be partly handled in software.
4.
Register ANAINIT in MCUR will always read as zero
The ANAINIT register in the MCUR module will always be read as zero even if written to a different value. The
actual content of the register is correct.
Problem fix/Workaround
Do not use software that reads these registers to get the Analog Initialization configuration.
5.
CPU clock frequency limited to 24MHz
The CPU clock must never exceed 24MHz for any supply level.
Problem fix/Workaround
None.
6.
CPU clock frequency limited to 20MHz if using both application section and boot section
The CPU clock frequency must never exceed 20MHz when jumping between flash application section and boot
section or executing code from one section and reading (LPM) from the other. If exceeding this frequency the first
instruction/read will be read as NOP/0x00.
These conditions occur when:
Executing code in one section and jumping (JMP, CALL, RET, branch) to other section.
Interrupt table is located in different flash section than the code is executed from.
Using LPM reading the other flash section than the code is executed from.
Reading signature rows
Running CRC and the address crosses the boundary between the two sections.
Problem fix/Workaround
For all conditions except CRC crossing the boundary between the sections, enable the Flash Power Reduction
mode and add a NOP after every LPM instruction. For CRC there is no workaround.
7.
High active current consumption at low frequency
The current consumption in Active mode is higher than specified for all frequencies below 12MHz. The extra cur-
rent consumption increases with supply level and lower frequency (see Figure 39-1 on page 135).
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