參數(shù)資料
型號: MN100351
廠商: National Semiconductor Corporation
英文描述: Low Power Hex D FLIP-FLOP(低功耗六D觸發(fā)器)
中文描述: 六角低功耗D觸發(fā)器(低功耗六?觸發(fā)器)
文件頁數(shù): 5/7頁
文件大?。?/td> 106K
代理商: MN100351
MN100351-X REV 1A0
MILITARY DATA SHEET
Electrical Characteristics
AC PARAMETERS
(The following conditions apply to all the following parameters, unless otherwise specified.)
AC:
VEE Range: -4.2V to -5.7V, LOADING: 50 Ohms to -2.0V, VCC=VCCA=GND
SYMBOL
PARAMETER
CONDITIONS
NOTES
PIN-
NAME
MIN
MAX
UNIT
SUB-
GROUPS
tpLH/tpHL(
1)
Propagation Delay
VEE=-4.2/-5.7V
2, 4 CPn to
Qn/Qn
0.5
2.2
ns
9
2, 4 CPn to
Qn/Qn
0.5
2.6
ns
10
2, 4 CPn to
Qn/Qn
0.4
2.4
ns
11
tpLH/tpHL(
2)
Propagation Delay
VEE=-4.2/-5.7V
2, 4 MR to
Qn/Qn
0.7
2.6
ns
9
2, 4 MR to
Qn/Qn
0.8
2.9
ns
10
2, 4 MR to
Qn/Qn
0.6
2.7
ns
11
tTLH/tTHL
Transistion Time
VEE=-4.2/-5.7V
6
Qn/Qn
0.2
1.6
ns
9, 10,
11
tS
Setup Time
VEE=-4.2/-5.7V
6
Dn to
CPn
0.8
ns
9
6
Dn to
CPn
0.9
ns
10, 11
tH
Hold Time
VEE=-4.2/-5.7V
6
Dn to
CPn
1.4
ns
9
6
Dn to
CPn
1.6
ns
10
6
Dn to
CPn
1.5
ns
11
tREL
VEE= -4.2/-5.7V
6
MR
1.8
ns
9
6
MR
2.6
ns
10
6
MR
1.6
ns
11
tPW(H)
Pulse Width
VEE= -4.2/-5.7V
6
CPn/MR
2.0
ns
9, 10,
11
fMAX
Maximum Clock
Frequency
VEE= -4.2/-5.7V
6
CPn
375
MHz
9, 10,
11
Note 1:
Screen tested 100% on each device at -55 C, +25 C and +125 C temp., subgroups 1, 2,
3, 7 & 8.
For QB devices, screen tested 100% on each device at +25C temperature only, subgroup
A9. For QMLV devices, screen tested 100% on each device at +25C, +125C & -55C
temperature, subgroups A9, 10 & 11.
Sample tested (Method 5005, Table 1) on each MFG. lot at +25 C, +125 C & -55 C temp.,
subgroups A1, 2, 3, 7 & 8.
Sample tested (Method 5005, Table 1) on each MFG. lot at +25 C, subgroup A9, and at
+125 C & -55 C temp., subgroups A10 & 11.
Sample tested (Method 5005, Table 1) on each MFG. lot at +25 C temp. only, subgroup
A9.
Not tested at +25 C, +125 C & -55 C temp. (DESIGN CHARACTERIZATION DATA).
Guaranteed by applying specified input condition and testing VOH/VOL.
Note 2:
Note 3:
Note 4:
Note 5:
Note 6:
Note 7:
5
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