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參數(shù)資料
| 型號： | MM908E626AVEK |
| 廠商： | Freescale Semiconductor |
| 文件頁數(shù)： | 24/43頁 |
| 文件大小： | 0K |
| 描述： | IC STEPPER MOTOR DRIVER 54-SOIC |
| 標(biāo)準(zhǔn)包裝： | 26 |
| 應(yīng)用： | 自動鏡像控制 |
| 核心處理器： | HC08 |
| 程序存儲器類型： | 閃存（16 kB） |
| 控制器系列： | 908E |
| RAM 容量： | 512 x 8 |
| 接口： | SCI，SPI |
| 輸入/輸出數(shù)： | 13 |
| 電源電壓： | 8 V ~ 18 V |
| 工作溫度： | -40°C ~ 115°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 54-BSSOP（0.295"，7.50mm 寬）裸露焊盤 |
| 包裝： | 管件 |
| 供應(yīng)商設(shè)備封裝： | 54-SOICW-EP |
| 產(chǎn)品目錄頁面： | 808 (CN2011-ZH PDF) |
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Analog Integrated Circuit Device Data
30
Freescale Semiconductor
908E626
FUNCTIONAL DEVICE OPERATION
OPERATIONAL MODES
HVDD_OCF bit. Writing a logic [0] to HVDD_OCF has no
effect.
1 = Overcurrent condition on HVDD has occurred.
0 = No overcurrent condition on HVDD has occurred.
LVF—Low Voltage Bit
This read only bit is a copy of the LVF bit in the Interrupt
Flag Register.
1 = Low voltage condition has occurred.
0 = No low voltage condition has occurred.
HVF—High Voltage Sensor Bit
This read-only bit is a copy of the HVF bit in the Interrupt
Flag Register.
1 = High voltage condition has occurred.
0 = No high voltage condition has occurred.
HB_OCF—H-Bridge Overcurrent Flag Bit
This read / write flag is set on an overcurrent condition at
the H-Bridges. Clear HB_OCF and enable the H-Bridge
driver by writing a logic [1] to HB_OCF. Reset clears the
HB_OCF bit. Writing a logic [0] to HB_OCF has no effect.
1 = Overcurrent condition on H-Bridges has occurred.
0 = No overcurrent condition on H-Bridges has
occurred.
HTF—Overtemperature Status Bit
This read-only bit is a copy of the HTF bit in the Interrupt
Flag Register.
1 = Overtemperature condition has occurred.
0 = No overtemperature condition has occurred.
AUTONOMOUS WATCHDOG (AWD)
The Autonomous Watchdog module consists of three
functions:
Watchdog function for the CPU in RUN mode
Periodic interrupt function in STOP mode
The Autonomous Watchdog module allows to protect the
CPU against code runaways.
The AWD is enabled if AWDIE, AWDRE in the AWDCTL
Register is set. If this bit is cleared, the AWD oscillator is
disabled and the watchdog switched off.
Watchdog
The watchdog function is only available in RUN mode. On
setting the AWDRE bit, watchdog functionality in RUN mode
is activated. Once this function is enabled, it is not possible to
disable it via software.
If the timer reaches end value and AWDRE is set, a
system reset is initiated. Operations of the watchdog function
cease in STOP mode. Normal operation will be continued
when the system is back to RUN mode.
To prevent a watchdog reset, the watchdog timeout
counter must be reset before it reaches the end value. This is
done by a write to the AWDRST bit in the AWDCTL Register.
PERIODIC INTERRUPT
Periodic interrupt is only available in STOP mode. It is
enabled by setting the AWDIE bit in the AWDCTL Register. If
AWDIE is set, the AWD wakes up the system after a fixed
period of time. This time period can be selected with bit
AWDR in the AWDCTL Register.
Autonomous Watchdog Control Register (AWDCTL)
AWDRST—Autonomous Watchdog Reset Bit
This write-only bit resets the Autonomous Watchdog
timeout period. AWDRST always reads 0. Reset clears
AWDRST bit.
1 = Reset AWD and restart timeout period.
0 = No effect.
AWDRE—Autonomous Watchdog Reset Enable Bit
This read/write bit enables resets on AWD timeouts. A
reset on the RST_A is asserted when the Autonomous
Watchdog has reached the timeout and the Autonomous
Watchdog is enabled. AWDRE is one-time setable (write
once) after each reset. Reset clears the AWDRE bit.
1 = Autonomous watchdog enabled.
0 = Autonomous watchdog disabled.
Autonomous Watchdog Interrupt Enable Bit (AWDIE)
This read/write bit enables CPU interrupts by the
Autonomous Watchdog timeout flag, AWFD. IRQ_A is only
asserted when the device is in STOP mode. Reset clears the
AWDIE bit.
1 = CPU interrupt requests from AWDF enabled
0 = CPU interrupt requests from AWDF disabled
AWDR—Autonomous Watchdog Rate Bit
This read/write bit selects the clock rate of the
Autonomous Watchdog. Reset clears the AWDR bit.
1 = Fast rate selected (10 ms).
0 = Slow rate selected (20 ms).
Register Name and Address: AWDCTL - $0a
Bit7
6
5
4
3
2
1
Bit0
Read
00
0
AWDRE
AWDIE
0
AWDR
Write
AWDRST
Reset
00
0
Notes
18.
This bit must always be set to 0.
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| MM908E626AVPEK | 功能描述:8位微控制器 -MCU MCU + LIN + MOTOR DRIVER RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| MM908E626AVPEKR2 | 功能描述:8位微控制器 -MCU RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| MM908E626R2 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Integrated Stepper Motor Driver with Embedded MCU and LIN Serial Communication |
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| MM90R9F | 制造商:Ohmite Mfg Co 功能描述: |
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