- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄1954 > MM908E621ACDWBR2 (Freescale Semiconductor)IC SW QUAD HB/TRPL HISID 54-SOIC PDF資料下載
參數(shù)資料
| 型號： | MM908E621ACDWBR2 |
| 廠商： | Freescale Semiconductor |
| 文件頁數(shù)： | 41/60頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC SW QUAD HB/TRPL HISID 54-SOIC |
| 標準包裝： | 1,000 |
| 應用： | 自動鏡像控制 |
| 核心處理器： | HC08 |
| 程序存儲器類型： | 閃存（16 kB） |
| 控制器系列： | 908E |
| RAM 容量： | 512 x 8 |
| 接口： | SCI，SPI |
| 輸入/輸出數(shù)： | 12 |
| 電源電壓： | 9 V ~ 16 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 54-BSSOP（0.295"，7.50mm 寬）裸露焊盤 |
| 包裝： | 帶卷 (TR) |
| 供應商設備封裝： | 54-SOICW-EP |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁當前第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁
Analog Integrated Circuit Device Data
46
Freescale Semiconductor
908E621
FUNCTIONAL DEVICE OPERATION
LOGIC COMMANDS AND REGISTERS
FACTORY TRIMMING AND CALIBRATION
To enhance the ease-of-use of the 908E621, various
parameters (e.g. ICG trim value) are stored in the flash
memory of the device. The following flash memory locations
are reserved for this purpose and might have a value different
from the “empty” ($FF) state:
$FD80:$FDDF Trim and Calibration Values
$FFFE:$FFFF Reset Vector
In the event the application uses these parameters, one
has to take care not to erase or override these values. If these
parameters are not used, these flash locations can be erased
and otherwise used.
Trim Values
The usage of the trim values located in the flash memory
are explained through the following:
Internal Clock Generator (ICG) Trim Value
The internal clock generator (ICG) module is used to
create a stable clock source for the microcontroller without
using any external components. The untrimmed frequency of
the low frequency base clock (IBASE), will vary as much as
±25 percent due to process, temperature, and voltage
dependencies. To compensate these dependencies, an ICG
trim value is located at address $FDC2. After trimming, the
ICG has a typ. range of ±2% (±3% max.), at nominal
conditions (filtered (100nF), stabilized (4.7
μF) VDD = 5.0 V,
TAMBIENT~25 °C), and will vary over temperature and voltage
(VDD) as indicated in the 68HC908EY16 datasheet.
To trim the ICG, this value has to be copied to the ICG Trim
Register ICGTR at address $38 of the MCU.
Important: The value must be copied after every reset.
Watchdog Period Range Value (AWD Trim)
The window watchdog supervises device recovery (e.g.
from code runaways).
The application software has to clear the watchdog within
the open window. Due to the high variation of the watchdog
period, and therefore the reduced width of the watchdog
window, a value is stored at address $FDCF. This value
classifies the watchdog period into 3 ranges (Range 0, 1, 2).
This allows the application software to select one of three
time intervals to clear the watchdog, based on the stored
value. The classification is done, so that the application
software can have up to ±19% variations of the optimal clear
interval (e.g. caused by ICG variation).
Effective Open Window
Having a variation in the watchdog period in conjunction
with a 50% open window, results in an effective open window,
which can be calculated by:
latest window open time: t_open = t_wd max / 2
earliest window closed time: t_closed = t_wd min
Optimal Clear Interval
The optimal clear interval, meaning the clear interval with
the biggest possible variation to latest window open time, and
to the earliest window closed time, can be calculated with the
following formula:
t_opt = t_open + (t_open+t_closed) / 2
See Table 13 to select the optimal clear interval for the
watchdog based on the Window No. and chosen period.
Table 13. Window Clear Interval
Window Range Period Select bits
Watchdog Period t_wd
Effective Open Window
Optimal Clear Interval
$FDCF
WDP1:0
min.
max.
Unit
t_open
t_closed
Unit
t_opt
Unit
max.
variation
0
00
68
92
ms
46
68
ms
57
ms
±19.3%
01
34
46
23
34
28.5
10
17
23
11.5
17
14.25
11
8.5
11.5
5.75
8.5
7.125
1
00
92
124
ms
62
92
ms
77
ms
±19.5%
01
46
62
31
46
38.5
10
23
31
15.5
23
19.25
11
11.5
15.5
7.75
11.5
9.625
2
00
52
68
ms
34
52
ms
43
ms
±20.9%
01
26
34
17
26
21.5
10
13
17
8.5
13
10.75
11
6.5
8.5
4.25
6.5
5.375
相關PDF資料 |
PDF描述 |
|---|---|
| MM908E622ACEK | IC HALF-BRIDGE QUAD 54-SOIC |
| MM908E624ACEWR2 | IC SWITCH TRPL HI MCU/LIN 54SOIC |
| MM908E625ACDWB | IC QUAD HALF BRDG MCU/LIN 54SOIC |
| MM908E626AVDWB | IC STEPPER MOTOR DRIVER 54-SOIC |
| MM912F634BV1AER2 | IC MCU 16BIT 32KB FLASH 48LQFP |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| MM908E621ACPEK | 功能描述:8位微控制器 -MCU QUAD H-B/3-HS W/MCU & LI RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT |
| MM908E621ACPEKR2 | 功能描述:8位微控制器 -MCU QUAD HB AND TRIPLE HS RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT |
| MM908E622 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Integrated Quad Half-Bridge, Triple High-Side and EC Glass Driver with Embedded MCU and LIN for High End Mirror |
| MM908E622_08 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Integrated Quad Half-bridge, Triple High Side and EC Glass Driver with Embedded MCU and LIN for High End Mirror |
| MM908E622ACDR2 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Integrated Quad Half-Bridge, Triple High-Side and EC Glass Driver with Embedded MCU and LIN for High End Mirror |
發(fā)布緊急采購，3分鐘左右您將得到回復。