參數(shù)資料
型號(hào)： ML9620GAZ210
廠商： OKI ELECTRIC INDUSTRY CO LTD
元件分類： 微控制器/微處理器
英文描述： 1 CHANNEL(S), 1M bps, LOCAL AREA NETWORK CONTROLLER, PQFP44
封裝： 0.80 MM PITCH, PLASTIC, QFP-44
文件頁(yè)數(shù)： 37/79頁(yè)
文件大?。?/td> 449K
代理商： ML9620GAZ210
ML9620 User’s Manual
Chapter 3
Operational Description
3 - 2
3.1.3 DAR(Disabled Automatic Retransmission)
According to the CAN Specification (see ISO11898, 6.3.3 Recovery Management), the ML9620 provides means
for automatic retransmission of frames that have lost arbitration or that have been disturbed by errors during
transmission.
The frame transmission service will not be confirmed to the user before the transmission is
successfully completed.
By default, this means for automatic retransmission is enabled.
It can be disabled to
enable the ML9620 to work within a Time Triggered CAN (TTCAN, see ISO11898-1) environment.
The Disabled Automatic Retransmission mode is enabled by programming bit DAR in the CAN Control Register
to ‘1’.
In this operation mode the programmer has to consider the different behaviour of bits TxRqst and
NewDat in the Control Registers of the Message Buffers:
When a transmission starts bit TxRqst of the respective Message Buffer is reset, while bit NewDat remains set.
When the transmission completed successfully bit NewDat is reset.
When a transmission failed (lost arbitration or error) bit NewDat remains set.
To restart the transmission the
MCU has to set TxRqst back to ‘1’.
3.2
Management of Message Objects
The configuration of the Message Objects in the Message RAM will (with the exception of the bits MsgVal,
NewDat, IntPnd, and TxRqst) not be affected by resetting the chip.
All the Message Objects must be initialized
by the MCU or they must be not valid (MsgVal = ‘0’) and the bit timing must be configured before the MCU
clears the Init bit in the CAN Control Register.
The configuration of a Message Object is done by programming Mask, Arbitration, Control and Data field of one
of the two interface register sets to the desired values.
By writing to the corresponding IFm Command Request
Register, the IFm Message Buffer Registers are loaded into the addressed Message Object in the Message RAM.
When the Init bit in the CAN Control Register is cleared, the CAN Protocol Controller state machine of the CAN
Control and the Message Handler State Machine control the ML9620’s internal data flow.
Received messages
that pass the acceptance filtering are stored into the Message RAM, messages with pending transmission request
are loaded into the CAN Control’s Shift Register and are transmitted via the CAN bus.
The MCU reads received messages and updates messages to be transmitted via the IFm Interface Registers.
Depending on the configuration, the MCU is interrupted on certain CAN message and CAN error events.
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