
ML9620 User’s Manual
Chapter 2
Register Descriptions
2 – 6
2.2.5 CAN Bit Timing 1 register (CANBITT1)
7
6
5
4
3
2
1
0
CANBITT1
SJW
BRP
reset value
0
1
Address
: CAN Base + 0x06
Access
: R/W
Only writable if bits CCE and Init in the CAN Control Register are set.
Access Size : 8 bits
Bit Descriptions
BRP
Baud Rate Prescaler
0-63
The value by which the oscillator frequency is divided for generating the bit time
quantum.
The bit time is built up from a multiple of this quantum.
Valid values
for the Baud Rate Prescaler are [ 0 … 63 ].
The actual interpretation by the
hardware of this value is such that one more than the value programmed here is
used.
SJW
Synchronisation Jump Width
0-3
Valid programmed values are 0-3.
The actual interpretation by the hardware of
this value is such that one more than the value programmed here is used.
2.2.6 CAN Bit Timing 2 register (CANBITT2)
7
6
5
4
3
2
1
0
CANBITT2
-*
TSeg2
TSeg1
reset value
0
1
0
1
Address
: CAN Base + 0x07
Access
: R/W
Only writable if bits CCE and Init in the CAN Control Register are set.
Access Size : 8 bits
Note
‘-’ : Reserved bits return '0' for reads and should be written '0' to them.
Operation is not guaranteed for a
writing '1' to them.
Bit Descriptions
Tseg1
The time segment before the sample point
0-15
Valid values for TSeg1 are [ 1 … 15 ].
The actual interpretation by the
hardware of this value is such that one more than the value programmed here is
used.
TSeg2
The time segment after the sample point
0-7
Valid values for TSeg2 are [ 0 … 7 ].
The actual interpretation by the hardware
of this value is such that one more than the value programmed here is used.
Note
With a ML9620’s clock of 8MHz, the reset value of CANBITT1=0x01 and CANBITT2=0x23 configure the
ML9620 it rate of 500 kBit/s.
The registers are only writable if bits CCE and Init in the CAN Control register
are set.