參數(shù)資料
型號(hào): ML2724
英文描述: 2.4GHz Low-IF 1.5Mbps FSK Transceiver Final Datasheet
中文描述: 2.4GHz的低IF 1.5Mbps的FSK收發(fā)器最終數(shù)據(jù)表
文件頁數(shù): 23/26頁
文件大?。?/td> 864K
代理商: ML2724
ML2724
RSSI & FREF
FREF (pin 9) is the master reference frequency for the transceiver. It supplies the frequency reference for the RF
channel frequency and the filter tuning. The FREF pin is a CMOS input with internal biasing resistors. It can be AC
coupled to sine or square wave source. The FREF input can also be driven by a CMOS logic output. The frequency of
the FREF input is limited to one of: 6.144MHz or 12.288MHz.
The Received Signal Strength Indicator (RSSI) pin supplies a voltage proportional to the logarithm of the received
power level. It is normally connected to the input of a low speed ADC and is used during channel scanning to detect
clear channels on which the radio may transmit. It can also be used to set transmit power to optimize power
consumption while maintaining an acceptable bit error rate (BER).
PA CONTROL OUTPUTS (PAON & AOUT)
The PAON (PA control) is a CMOS output that controls an optional off-chip RF PA. It outputs a logic high when the PA
should be enabled and a logic low at all other times. This output is inhibited when the PLL fails to lock.
AOUT (pin 7) normally supplies the analog (not data-sliced) data output, but it can also be configured as an open-drain
output for transmit power control. This mode is controlled by the TPC bit in Register 0. This bit can be changed at any
time, but the AOUT pin will not change mode until the beginning of the next transmit slot, triggered by a falling edge on
RXON
(see
Figure 6
and
Table 17 for details).
In analog test modes the RSSI and AOUT pins become analog test access ports that allow the user to observe internal
signals in the ML2724.
t1
t2
t3
t4
RXON
PAON
Output from
TRFO
SYMBOL
PARAMETER
TIME/
μ
S
T1
RXON falling edge to PAON rising edge
62.5
T2
RXON rising edge to PLL frequency
shift
6.5
T3
RXON rising edge to RECEIVE mode
70
T4
RXON rising edge to PAON falling edge
< 0.1
Figure 6: Power Amplifier Interface
Table 17: Power Amplifier Timing
RF INTERFACE: RXI & TXO/TXOB
The RXI receive input (pin 17) and the TXO/TXOB differential transmit outputs (pins 21 and 22) are the only RF I/O
pins. The RXI pin requires a simple impedance matching network for optimum input noise figure. The TXO/TXOB pins
require a matching network for maximum power output into the RF power amp. If a single ended output is preferred, the
signal from the TXO pin can be matched to the power amp and the TXOB output can be shunted to a power supply
through a dummy load. The RF input and output ground (pin 18) must have a direct connection to the RF ground plane,
and the RF power supply pins must be decoupled to the same ground plane as close to the device as possible.
DS2724-F-01
FINAL DATASHEET
APRIL 2003
23
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