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參數(shù)資料
| 型號(hào)： | MK74ZD133FT |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時(shí)鐘及定時(shí) |
| 英文描述： | ZD SERIES, PLL BASED CLOCK DRIVER, 32 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO56 |
| 封裝： | 0.300 INCH, SSOP-56 |
| 文件頁(yè)數(shù)： | 7/8頁(yè) |
| 文件大小： | 116K |
| 代理商： | MK74ZD133FT |
MK74ZD133
PLL and 32-Output Clock Driver
PRELIMINARY
PRELIMINARY INFORMATION
INFORMATION
MDS 74ZD133 C
7
Revision 010899
Printed 11/17/00
Integrated Circuit Systems, Inc.525 Race StreetSan JoseCA95126(408)295-9800telwww.icst.com
b
D
E
H
e
Q
c
A
h x 45°
Package Outline and Package Dimensions for
56 pin SSOP
56 pin SSOP - F package
Inches
Millimeters
Symbol
Min
Max
Min
Max
A
0.095
0.110
2.413
2.794
b
0.008
0.013
0.203
0.343
c
0.005
0.010
0.127
0.254
D
0.720
0.730
18.288
18.542
E
0.292
0.299
7.417
7.595
H
0.400
0.410
10.160
10.414
e
.025 BSC
0.64 BSC
L
0.024
0.040
0.610
1.016
Q
0.008
0.016
0.203
0.406
L
e
D
B
E
D1
E1
1.00
REF.
L
A2
A1
Package Outline for 64 pin LQFP
A
相關(guān)PDF資料 |
PDF描述 |
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| MK74ZD133FLF | ZD SERIES, PLL BASED CLOCK DRIVER, 32 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO56 |
| MK74ZD133FLF | ZD SERIES, PLL BASED CLOCK DRIVER, 32 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO56 |
| MK74ZD133F | ZD SERIES, PLL BASED CLOCK DRIVER, 32 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO56 |
| MK74ZD133YLFT | ZD SERIES, PLL BASED CLOCK DRIVER, 32 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP64 |
| MK9173-01CS08 | 9173 SERIES, PLL BASED CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MK74ZD133Y | 制造商:ICS 制造商全稱:ICS 功能描述:PLL and 32-Output Clock Driver |
| MK74ZD133YT | 制造商:ICS 制造商全稱:ICS 功能描述:PLL and 32-Output Clock Driver |
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