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參數(shù)資料
| 型號： | MK74ZD133FT |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時鐘及定時 |
| 英文描述： | ZD SERIES, PLL BASED CLOCK DRIVER, 32 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO56 |
| 封裝： | 0.300 INCH, SSOP-56 |
| 文件頁數(shù)： | 2/8頁 |
| 文件大?。?/td> | 116K |
| 代理商： | MK74ZD133FT |
MK74ZD133
PLL and 32-Output Clock Driver
PRELIMINARY
PRELIMINARY INFORMATION
INFORMATION
MDS 74ZD133 C
2
Revision 010899
Printed 11/17/00
Integrated Circuit Systems, Inc.525 Race StreetSan JoseCA95126(408)295-9800telwww.icst.com
Pin Assignments
1
8
9
2
3
4
5
6
7
10
11
12
13
14
43
42
47
44
45
46
52
51
50
49
48
53
54
55
OUT4
VDD
GND
OUT1
FBIN
GND
FBOUT3
OUT2
CLKIN
OUT7
OUT5
VDD5:8
OUT6
OUT27
VDD
GND
OUT31/S3
OUT32/S4
OUT26
OUT28/S0
VDD
OUT30/S2
OUT23
OUT25
OUT24
GND
OUT29/S1
15
22
23
16
17
18
19
20
21
24
25
26
27
28
30
29
33
31
32
38
37
36
35
34
39
40
41
GND
VDD
OUT19
OUT21
VDD21:24
OUT18
VDD
OUT22
GND
VDD
OUT17
OUT15
OUT16
OUT20
VDD13:14
OUT12
OUT11
OUT9
OUT8
VDD9:12
OE
GND
OUT10
VDD
OUT13
GND
OUT14
56
The MK74ZD133 offers a unique power supply structure that effectively creates five separate blocks of
outputs. The main supply (VDD) goes to all internal circuitry and to 18 outputs, as shown in the Pin
Descriptions table. The other 14 outputs are split into 4 blocks that are powered independently of the main
VDD supply. Each block has its own supply which can be the same as VDD, less than VDD, or left
unpowered to shut off the corresponding outputs. For example, with VDD = 3.3 V, VDD5:8 can be
unconnected and the OUT5:8 levels will be floating. The table below summarizes the power supply control
of the MK74ZD133.
VDD on pins
Controlling the Output Blocks
VDD Name
F Pin # Y Pin #
Output Name
F Pin Numbers
Y Pin Numbers
VDD5:8
13
6
OUT5:8
11, 12, 14, 15
4, 5, 7, 8
VDD9:12
19
12
OUT9:12
17, 18, 20, 21
10, 11, 13, 14
VDD13:14
23
16
OUT13:14
25, 26
19, 20
VDD21:24
42
40
OUT21:24
40, 41, 43, 44
38, 39, 41, 42
1
8
9
2
3
4
5
6
7
10
11
12
13
14
15
16
OUT4
GND
FBOUT3
OUT7
OUT5
VDD5:8
OUT6
VDD13:14
OUT12
OUT11
OUT9
OUT8
VDD9:12
GND
OUT10
43
42
47
44
45
46
48
33
38
37
36
35
34
39
40
41
OUT27
VDD
OUT26
OUT28/S0
OUT23
OUT25
GND
OUT19
OUT21
OUT22
GND
OUT20
VDD21:24
OUT24
VDD
Y Package 10mm x 10mm x 1.4mm
F Package 300 mil wide
F Main Supply
Y Main Supply
6, 7, 28, 29
24, 25, 33, 34
35, 36, 50, 55
48, 54, 62, 63
and 64
LQFP
SSOP
相關(guān)PDF資料 |
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| MK74ZD133FLF | ZD SERIES, PLL BASED CLOCK DRIVER, 32 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO56 |
| MK74ZD133FLF | ZD SERIES, PLL BASED CLOCK DRIVER, 32 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO56 |
| MK74ZD133F | ZD SERIES, PLL BASED CLOCK DRIVER, 32 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO56 |
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