- 您現(xiàn)在的位置：買賣IC網 > PDF目錄45331 > MK51DX256ZCMC10R (FREESCALE SEMICONDUCTOR INC) 32-BIT, FLASH, 100 MHz, RISC MICROCONTROLLER, PBGA121 PDF資料下載
參數(shù)資料
| 型號： | MK51DX256ZCMC10R |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, FLASH, 100 MHz, RISC MICROCONTROLLER, PBGA121 |
| 封裝： | 8 X 8 MM, MAPBGA-121 |
| 文件頁數(shù)： | 37/72頁 |
| 文件大?。?/td> | 1005K |
| 代理商： | MK51DX256ZCMC10R |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁當前第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁
Table 28. 16-bit ADC with PGA characteristics (continued)
Symbol
Description
Conditions
Min.
Typ.1
Max.
Unit
Notes
VPP,DIFF
Maximum
differential input
signal swing
where VX = VREFPGA × 0.583
V
SNR
Signal-to-noise
ratio
Gain=1
Gain=64
TBD
83.0
57.5
—
dB
16-bit
differential
mode,
Average=32
THD
Total harmonic
distortion
Gain=1
Gain=64
TBD
89.4
90.0
—
dB
16-bit
differential
mode,
Average=32,
fin=500Hz
SFDR
Spurious free
dynamic range
Gain=1
Gain=64
TBD
90.9
77.0
—
dB
16-bit
differential
mode,
Average=32,
fin=500Hz
ENOB
Effective number
of bits
Gain=1, Average=4
Gain=1, Average=8
Gain=64, Average=4
Gain=64, Average=8
Gain=1, Average=32
Gain=2, Average=32
Gain=4, Average=32
Gain=8, Average=32
Gain=16, Average=32
Gain=32, Average=32
Gain=64, Average=32
TBD
12.3
12.7
8.4
8.7
13.3
13.1
12.5
11.8
11.1
10.2
9.3
—
bits
16-bit
differential
mode,fin=100H
z
SINAD
Signal-to-noise
plus distortion
ratio
See ENOB
6.02 × ENOB + 1.76
dB
1. Typical values assume VDDA =3.0V, Temp=25°C, fADCK=6MHz unless otherwise stated.
2. This current is a PGA module adder, in addition to and ADC conversion currents.
3. Between IN+ and IN-. The PGA draws a DC current from the input terminals. The magnitude of the DC current is a strong
function of input common mode voltage (VCM) and the PGA gain.
4. Gain = 2PGAG
5. After changing the PGA gain setting, a minimum of 2 ADC+PGA conversions should be ignored.
6. Limit the input signal swing so that the PGA does not saturate during operation. Input signal swing is dependent on the
PGA reference voltage and gain setting.
Peripheral operating requirements and behaviors
K51 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011.
42
Preliminary
Freescale Semiconductor, Inc.
相關PDF資料 |
PDF描述 |
|---|---|
| MK51DX256ZCMC10 | 32-BIT, FLASH, 100 MHz, RISC MICROCONTROLLER, PBGA121 |
| MK51N512CLQ100R | 32-BIT, FLASH, 100 MHz, RISC MICROCONTROLLER, PQFP144 |
| MK51N512CMD100R | 32-BIT, FLASH, 100 MHz, RISC MICROCONTROLLER, PBGA144 |
| MK51N256CLQ100 | 32-BIT, FLASH, 100 MHz, RISC MICROCONTROLLER, PQFP144 |
| MK51N512CMD100 | 32-BIT, FLASH, 100 MHz, RISC MICROCONTROLLER, PBGA144 |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| MK51DX256ZCYY10 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Integrated measurement engine, Ethernet and LCD |
| MK51N256CLQ100 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Up to 100 MHz ARM Cortex-M4 core with DSP instructions delivering 1.25 Dhrystone MIPS per MHz |
| MK51N256CMD100 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Up to 100 MHz ARM Cortex-M4 core with DSP instructions delivering 1.25 Dhrystone MIPS per MHz |
| MK51N512CLL100 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Up to 100 MHz ARM Cortex-M4 core with DSP instructions delivering 1.25 Dhrystone MIPS per MHz |
| MK51N512CLQ100 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Up to 100 MHz ARM Cortex-M4 core with DSP instructions delivering 1.25 Dhrystone MIPS per MHz |
發(fā)布緊急采購，3分鐘左右您將得到回復。