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參數(shù)資料
| 型號： | MIC3000BML TR |
| 廠商： | Micrel Inc |
| 文件頁數(shù)： | 49/58頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC TXRX OPTICAL MANAGEMENT 24MLF |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 類型： | 收發(fā)器 |
| 電源電壓： | 3 V ~ 3.6 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 24-VFQFN 裸露焊盤，24-MLF? |
| 供應(yīng)商設(shè)備封裝： | 24-MLF?（4x4） |
| 包裝： | 帶卷 (TR) |
| 其它名稱： | MIC3000BMLTR MIC3000BMLTR-ND |
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October 2004
53
M9999-101204
MIC3000
Micrel
Bit(s)
Function
Operation
D[7]
INV
Inverts the APC op-amp inputs. When set to “0”
0 = emitter follower (no inversion);
the BIAS DAC output is connected to the “+”
1 = common emitter (inverted); read/write;
input and FB is connected to the “–” input of the
non-volatile.
op amp. Set to “0” to use the ADC feedback loop.
D[6]
GAIN
Sets the feedback voltage range by changing the
1 = VREF/4 full scale;
APCDAC output swing; 0-VREF for optical
0 = VREF full scale; read/write ;non-volatile.
feedback, 0-VREF/4 for electrical feedback.
D[5]
BIASREF
Selects whether FB and VMPD are referenced to
1 = VDD; 0 = GND; read/write; non-volatile.
ground or VDD and selects feedback resistor
termination voltage (VDDA or GNDA).
D[4:2]
RFB[2:0]
Selects internal feedback resistance. (Resistors
000 = ×;
will be terminated to VDDA or GNDA according
001 = 800,
to BIASREF.)
010 = 1.6k,
011 = 3.2k,
100 = 6.4k,
101 = 12.8k,
110 = 25.6k,
111 = 51.2k;
read/write; non-volatile.
D[1]
SRCE
VBIAS source vs. sink drive.
1 = source (NPN),
0 = sink (PNP); read/write; non-volatile.
D[0]
SPOL
Polarity of shutdown output, SHDN, when active.
1 = high;
0 = low; read/write; non-volatile.
OEM Configuration Register 2 (OEMCFG2)
D[7]
D[6]
D[5]
D[4]
D[3]
D[2]
D[1]
D[0]
I2CADR[3]
I2CADR[2]
I2CADR[1]
I2CADR[0]
LUTOFF
read/write
Default Value
1010 xxxxb = xxh (slave address = 1010xxxb)
Serial Address
A6h = 1010011b
Byte Address
2 = 02h
CAUTION: Changes to I2CADR take effect immediately! Any accesses following a write to I2CADR must be to the
newly programmed serial bus address. A valid OEM password is required for access to this register. This register is
non-volatile and will be maintained through power and reset cycles.
Bit(s)
Function
Operation
D[7:4]
I2CADR[3:0]
Upper four MSBs of the serial bus slave address;
Read/write; non-volatile.
writes take effect immediately.
D[3:0]
LUTOFF
LUT offset. LUTOFF is added to the result of the
Read/write; non-volatile.
digital temperature sensor to derive the table
index; writes take effect after reset.
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