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參數(shù)資料
| 型號(hào)： | MH89760BN |
| 廠商： | Mitel Networks Corporation |
| 元件分類： | 通信及網(wǎng)絡(luò) |
| 英文描述： | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| 中文描述： | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| 文件頁數(shù)： | 20/38頁 |
| 文件大?。?/td> | 846K |
| 代理商： | MH89760BN |
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4-74
MH89760B
Preliminary Information
Figure 13 - PCM/Voice Data Channel Bank
Switch Matrix
T1 Interface
Equal-
izer
12.352
MHz Osc.
16.384
MHz Osc.
MT8941
DPLL#1
CVb
F0i
C12i
DPLL#2
F0b
C4b
C2o
C8Kb
C16i
MH89760B
DSTi
DSTo
CSTi0
CSTo
CSTi1
C2i
F0i
C1.5i
OUTA
OUTB
RxT
RxR
E8Ko
μ
P
MT8980
STo0
STi0
STo3
STi3
F0i
C4i
STo1
STi1
STo2
STi2
STo4
C1.5i
C2i
C4i
F0i
Shift
Reg.
MT8870
STD
MT8964
MT8870
STD
MT8964
Shift
Reg.
CTLo
OFHK
MUX
Signalling Interface
Analog Line Interface
SLIC #1
CTLi
OFHK
#1
D3
Do
#1
#N
Do
D3
#N
PCMi
PCMi
PCMo
T
R
T
R
SLIC #24
easily accomplished by the MT8980 switch matrix
once the SLIC has digitized the analog signal.
Channel banks must be able to operate in a loop
timed mode so that
synchronization requirements of a level four entity.
Phase-locked loop #2 of the MT8941 generates the
ST-BUS clocks that are synchronized to the
extracted 8kHz clock, and phase-locked loop #1
generates the transmit T1 clock synchronized to the
ST-BUS.
they
meet the
clock
4. ISDN Voice/Data Channel Bank/Concentrator
The ISDN channel bank is a term that is used in this
context to describe a system that performs the same
logical function as the D3/D4 channel bank. That is,
it concentrates the subscribers digital loop into the
primary digital transmission scheme, the T1 trunk.
The ISDN channel bank in Figure 14 is divided into
four blocks, the digital line interface, the switch
matrix, the D channel processing, and the T1
interface. Beginning with the digital line interface, the
MT8910 provides 2B+D 160k bit bidirectional
communication over single twisted pair wiring. The
MT8910 converts the 160kbit line signal into ST-Bus
format, where it can be manipulated by the MT8980
switch matrix. The data received from the MT8910 is
then transferred to the D channel processor by the
switch matrix. The D channel processor converts the
2B+D format used on the 160 kBit digital line into the
23B+D format used on the T1 Link.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MH89760BS | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| MH89761 | T1 Transmit Equalizer Advance Information |
| MH89770N | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| MH89770 | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| MH89770S | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MH89760BS | 制造商:MITEL 制造商全稱:Mitel Networks Corporation 功能描述:ST-BUS⑩ FAMILY T1/ESF Framer & Interface Preliminary Information |
| MH89761 | 制造商:MITEL 制造商全稱:Mitel Networks Corporation 功能描述:T1 Transmit Equalizer Advance Information |
| MH89770 | 制造商:MITEL 制造商全稱:Mitel Networks Corporation 功能描述:T1/ESF Framer & Interface Preliminary Information |
| MH89770N | 制造商:MITEL 制造商全稱:Mitel Networks Corporation 功能描述:T1/ESF Framer & Interface Preliminary Information |
| MH89770S | 制造商:MITEL 制造商全稱:Mitel Networks Corporation 功能描述:T1/ESF Framer & Interface Preliminary Information |
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