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參數(shù)資料
| 型號： | MG-3020DD |
| 廠商： | 愛普生（中國）有限公司 |
| 英文描述： | Multi-Output Crystal Oscillator(多輸出晶體振蕩器) |
| 中文描述： | 多輸出晶體振蕩器（多輸出晶體振蕩器） |
| 文件頁數(shù)： | 1/1頁 |
| 文件大?。?/td> | 204K |
| 代理商： | MG-3020DD |
51
Crystal oscillator
External dimensions
Block diagram
Absolute Max. rating
Specifications (characteristics)
Terminal connection
(Unit: mm)
5
2
0
6
2.54
0.5
0.25
90
°
to
105
°
7.62
19.8 Max.
Operating range
oscillation source frequency is 17.7340 MHz to 40.000 MHz
Frequency characteristics
32.0000MHz C
1
2
3
4
5
6
7
14
13
12
11
10
9
8
15.24
MG3020 9352A
E
1
2
3
4
5
6
7
14
13
12
11
10
9
8
V
DD
1/2SEL
EXC
F
OUT
OUT
1
Output circuit
OUT
2
OUT
3
OUT
4
OUT
5
CSEL
RESET
GND
Synchronous counter
Clock
pulse
select
Dividing
ratio
select
1/2 divider
Oscillation
circuit
MULTI-OUTPUT CRYSTAL OSCILLATOR
MG-3020DD
Simultaneous output. (1/1, 1/2, 1/4, 1/8 and 1/16 output frequency ratio)
Built-in cylindrical AT-cut crystal unit assures high reliability.
DIP 14-pin plastic package allows automatic mounting.
External clock select function, dividing circuit reset function and
1/2 divider select function.
Item
Supply voltage
Input voltage
Output current
Storage temperature
Soldering condition
Symbol
V
DD
V
I
I
O
T
STG
T
SOL
Rating
-0.5 V to +7.0 V
-0.5 V to V
DD
+0.5 V
30 mA Max.
-55
°
C to +100
°
C
Under +260
°
C within 10 s (lead part)
Package should be less than +150
°
C
Item
Operating voltage
Output current
Operating temperature
Output load condition
Symbol
V
DD
I
O
T
OPR
C
L
Rating
Min.
4.5
-10
Typ.
5.0
25
Max.
5.5
1.6
70
15
Unit
V
mA
°
C
pF
Item
Frequency stability
Aging
Symbol
f/f
0
fa
Specification
±100 x 10
-6
±5 x 10
-6
/year
Remarks
-20
°
C to +70
°
C
Ta=+25
°
C
, V
DD
=5 V
first year
Terminal
V
DD
GND
OUT
1
OUT
2
OUT
3
OUT
4
OUT
5
F
OUT
CSEL
1/2 SEL
NC
Pin No.
14
7
8
9
10
11
12
13
4
5
3
6
1 and 2
Function
+5 V power supply
GND
1/1 source frequency
1/2 source frequency
1/4 source frequency
1/8 source frequency
1/16 source frequency
Source frequency
When this pin is made L, the external clock is selected
(pull-up resistor incorporated)
External clock pulse input pin
(pStops output at RESET
=L
1/2 frequency output at 1/2SEL
(pull-up resistor incorporated)
NC is not connected internally
_____
L level mode, please note that all output
=L
When the power switch is turned on in RESET
becomes high impedance. To resume normal operation, disable the RESET
terminal.
Actual size
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