參數資料
型號： MF280C51-30D
廠商： ATMEL CORP
元件分類： 微控制器/微處理器
英文描述： 8-BIT, MROM, 30 MHz, MICROCONTROLLER, PQFP44
封裝： QFP-44
文件頁數： 149/176頁
文件大小： 2962K
代理商： MF280C51-30D
74
2535J–AVR–08/10
ATtiny13
11.9.4
OCR0A – Output Compare Register A
The Output Compare Register A contains an 8-bit value that is continuously compared with the
counter value (TCNT0). A match can be used to generate an Output Compare interrupt, or to
generate a waveform output on the OC0A pin.
11.9.5
OCR0B – Output Compare Register B
The Output Compare Register B contains an 8-bit value that is continuously compared with the
counter value (TCNT0). A match can be used to generate an Output Compare interrupt, or to
generate a waveform output on the OC0B pin.
11.9.6
TIMSK0 – Timer/Counter Interrupt Mask Register
Bits 7:4, 0 – Res: Reserved Bits
These bits are reserved bits in the ATtiny13 and will always read as zero.
Bit 3 – OCIE0B: Timer/Counter Output Compare Match B Interrupt Enable
When the OCIE0B bit is written to one, and the I-bit in the Status Register is set, the
Timer/Counter Compare Match B interrupt is enabled. The corresponding interrupt is executed if
a Compare Match in Timer/Counter occurs, i.e., when the OCF0B bit is set in the Timer/Counter
Interrupt Flag Register – TIFR0.
Bit 2 – OCIE0A: Timer/Counter0 Output Compare Match A Interrupt Enable
When the OCIE0A bit is written to one, and the I-bit in the Status Register is set, the
Timer/Counter0 Compare Match A interrupt is enabled. The corresponding interrupt is executed
if a Compare Match in Timer/Counter0 occurs, i.e., when the OCF0A bit is set in the
Timer/Counter 0 Interrupt Flag Register – TIFR0.
Bit 1 – TOIE0: Timer/Counter0 Overflow Interrupt Enable
When the TOIE0 bit is written to one, and the I-bit in the Status Register is set, the
Timer/Counter0 Overflow interrupt is enabled. The corresponding interrupt is executed if an
overflow in Timer/Counter0 occurs, i.e., when the TOV0 bit is set in the Timer/Counter 0 Inter-
rupt Flag Register – TIFR0.
Bit
7
65432
10
OCR0A[7:0]
OCR0A
Read/Write
R/W
Initial Value
0
00000
00
Bit
7
65432
10
OCR0B[7:0]
OCR0B
Read/Write
R/W
Initial Value
0
00000
00
Bit
7654
3
2
1
0
––––
OCIE0B
OCIE0A
TOIE0
–
TIMSK0
Read/Write
RRRR
R/W
R
Initial Value
0000
0
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