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42073A-MCU Wireless-02/13
ATmega2564/1284/644RFR2
12.6.4 PRR2 – Power Reduction Register 2
Bit
7
6
5
4
3
2
1
0
NA ($63)
Res3
Res2
Res1
Res0
PRRAM3 PRRAM2 PRRAM1 PRRAM0
PRR2
Read/Write
R
RW
Initial Value
0
The Power Reduction Register PRR2 allows to individually disable all four SRAM
blocks. Setting any PRRAM3:0 bit to one will completely switch off (disconnect from the
power supply) the corresponding SRAM block. This enables the application to disable
unused SRAM memory to save power. Every SRAM block can be re-enabled by
reseting the appropriate PRRAM3:0 bit.
Bit 7:4 – Res3:0 - Reserved Bit
This bit is reserved for future use. A read access always will return zero. A write access
does not modify the content.
Bit 3 – PRRAM3 - Power Reduction SRAM 3
Setting this bit to one will disable the SRAM block 3. Setting this bit to zero will enable
the SRAM block 3.
Bit 2 – PRRAM2 - Power Reduction SRAM 2
Setting this bit to one will disable the SRAM block 2. Setting this bit to zero will enable
the SRAM block 2.
Bit 1 – PRRAM1 - Power Reduction SRAM 1
Setting this bit to one will disable the SRAM block 1. Setting this bit to zero will enable
the SRAM block 1.
Bit 0 – PRRAM0 - Power Reduction SRAM 0
Setting this bit to one will disable the SRAM block 0. Setting this bit to zero will enable
the SRAM block 0.
12.6.5 TRXPR – Transceiver Pin Register
Bit
7
6
5
4
3
2
1
0
NA ($139)
Res3
Res2
Res1
Res0
ATBE
TRXTST
SLPTR
TRXRST
TRXPR
Read/Write
R
RW
Initial Value
0
The register TRXPR allows to control basic actions of the radio transceiver like reset or
state transitions. The register bit functionality is inherited from the external pins of the
stand-alone radio transceiver.
Bit 7:4 – Res3:0 - Reserved
Bit 3 – ATBE - Analog Test-bus Enable
The analog test-bus can be enabled by setting this bit to one. The test-bus can only be
activated in the test-mode. Internal analog signals are then available at the TSTOP,
TSTON, TSIP and TSTIN pins.
Bit 2 – TRXTST - Transceiver Test-mode Enable
The TRXTST bit enables the test-functionality of the transceiver. In addition the general
device test-mode must be enabled by applying the appropriate test-signature.