參數(shù)資料
型號： MCZ33927EK
廠商： 飛思卡爾半導體(中國)有限公司
英文描述： Transistor; Type: Amplifiers/Bipolar; VCEO (V): -100; Ic (A): -1; Pc (W): 0.9; hFE: 140 to 350; VCE (sat) (V) max: -0.5; Package: TO-92Mod
中文描述： 三相場效應晶體管預驅動器
文件頁數(shù)： 8/44頁
文件大小： 490K
代理商： MCZ33927EK
Analog Integrated Circuit Device Data
Freescale Semiconductor
8
33927
ELECTRICAL CHARACTERISTICS
STATIC ELECTRICAL CHARACTERISTICS
STATIC ELECTRICAL CHARACTERISTICS
Table 3. Static Electrical Characteristics
Characteristics noted under conditions 8.0V
≤
V
PWR
= V
BAT
≤
40V
,
-40
°
C
≤
T
A
≤
125
°
C, unless otherwise noted. Typical
values noted reflect the approximate parameter means at T
A
= 25°C under nominal conditions unless otherwise noted.
Characteristic
Symbol
Min
Typ
Max
Unit
POWER INPUTS
VBAT Supply Voltage Startup Threshold
(8)
V
BAT_ST
I
BAT
–
6.0
8.0
V
VBAT Supply Current, V
PWR
= V
BAT
= 40V
RST and ENABLE = 5.0V
No output loads on Gate Drive Pins, No PWM
No output loads on Gate Drive Pins, 20kHz, 50% Duty Cycle
–
–
1.0
–
–
10
mA
VPWR Supply Current, V
PWR
= V
BAT
= 40V
RST and ENABLE = 5.0V
No output loads on Gate Drive Pins, No PWM
Output Loads = 620nC per FET, 20kHz PWM
(9)
I
PWR_ON
–
–
11
–
20
95
mA
Sleep State Supply Current, RST = 0V
V
BAT
= 40V
V
PWR
= 40V
I
BAT
I
PWR
–
–
14
56
30
100
μA
Sleep State Output Gate Voltage
IG < 100μA
V
GATESS
–
–
1.3
V
Trickle Charge Pump (Bootstrap Voltage)
V
BAT
= 14V
V
Boot
22
28
32
V
Bootstrap Diode Forward Voltage at 10mA
V
F
–
–
1.2
V
VDD V INTERNAL REGULATOR
V
DD
Output Voltage, V
PWR
= 8V to 40V, C = 0.47μF
(10)
External Load I
DD_EXT
= 0 to 1.0mA
V
DD
4.5
–
5.5
V
Internal V
DD
Supply Current, V
DD
= 5.5V, No External Load
VLS REGULATOR
I
DD
–
–
12
mA
Peak Output Current, V
PWR
= 16V, V
LS
= 10V
Linear Regulator Output Voltage, I
VLS
= 0 to 60mA
(11)
VLS Disable Threshold
(12)
I
PEAK
V
LS
V
THVLS
350
600
800
mA
13.5
15
17
V
7.5
8.0
8.5
V
Notes
8.
When minimum system voltage could be less than 14V operation with the Charge Pump is recommended. V
BAT
must exceed this
threshold in order for the Charge Pump and V
DD
regulator to startup and drive V
PWR
to > 8.0V. Once V
PWR
exceeds 8.0V, the circuits
will continue to operate even if V
BAT
drops below 6.0V.
This parameter is guaranteed by design. It is not production tested.
Minimum external capacitor for stable V
DD
operation is 0.47μF.
Recommended external capacitor for the V
LS
regulator is 2.2μF low ESR at each pin VLS and VLS_CAP.
When V
LS
is less than this value, the outputs are disabled and HOLDOFF circuits are active.
9.
10.
11.
12.
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