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參數(shù)資料
| 型號(hào)： | MCZ33793EFR2 |
| 廠商： | Freescale Semiconductor |
| 文件頁數(shù)： | 4/27頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DSI SLAVE FOR R-SENSE 16-SOIC |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 類型： | 傳感器接口 |
| 輸入類型： | 邏輯 |
| 輸出類型： | 邏輯 |
| 接口： | 并聯(lián) |
| 電流 - 電源： | 250mA |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-SOIC（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 16-SOIC N |
| 包裝： | 標(biāo)準(zhǔn)包裝 |
| 產(chǎn)品目錄頁面： | 808 (CN2011-ZH PDF) |
| 其它名稱： | MCZ33793EFR2DKR |
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Analog Integrated Circuit Device Data
12
Freescale Semiconductor
33793
FUNCTIONAL DESCRIPTION
FUNCTIONAL INTERNAL BLOCK DESCRIPTION
Read the general purpose I/O logic values and respond
to request for these values.
Generating a cycle redundancy check (CRC) for the
received data and transmitted data in conformance with
the DSI Bus Standard.
Additionally, the control logic performs error checking on the
received data. If errors are found, no action is taken and no
response is made. Errors include:
CRC received doesn’t match CRC of received data.
Number of received bits is not 12 or 20.
CLOCK
The clock is a low-stability type with the capacitor integrated
onto the die. The signaling system and all internal operations
are such that no external precision timing device is needed in
the normal operation of this device.
BUS SWITCH (BUSSW)
The bus switch passes signaling and power to all subsequent
devices on the bus. It can block a voltage of either polarity up
to the highest idle state level between BUSIN and BUSOUT.
LOGICOUT
LOGICOUT is a logic level output with enhanced high-side
drive capability.
ADDRESSING
The 33793 IC supports both runtime programmable and pre-
programmed addressing as defined in the DSI Specification.
Runtime programmable addressing uses the daisy chain bus
connection. Pre-programmed devices may either be
connected in daisy chain or in parallel on the bus wires.
Programmable address devices all power up with a device
address of $0 in their address register and their bus switches
open. In the daisy chain, if the first device receives the
initialization command device on BUSIN, it will accept the
address in the command and close its switch at the end of the
command. The next device in the chain will now be able to
receive the initialization command on its BUSIN and will
accept the next address. This proceeds down the chain until
the last device is addressed. The devices can also be
initialized by the reverse initialization command if the signal is
applied to BUSOUT.
Pre-programmed devices power up with their pre-
programmed address in its address register. It will ignore all
Initialization commands unless the address in the command
matches its pre-programmed address. In this event the
device stores the other information contained in the
Initialization command.
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