Positive Power Supply Input (VDD
參數(shù)資料
型號(hào)： MCP40D19T-503E/LT
廠商： Microchip Technology
文件頁(yè)數(shù)： 24/43頁(yè)
文件大?。?/td> 0K
描述： IC DGTL POT 50K 128TAPS SC70-5
標(biāo)準(zhǔn)包裝： 1
接片： 128
電阻（歐姆）： 50k
電路數(shù)： 1
溫度系數(shù)： 標(biāo)準(zhǔn)值 150 ppm/°C
存儲(chǔ)器類(lèi)型： 易失
接口： I²C
電源電壓： 1.8 V ~ 5.5 V
工作溫度： -40°C ~ 125°C
安裝類(lèi)型： 表面貼裝
封裝/外殼： 6-TSSOP（5 引線），SC-88A，SOT-353
供應(yīng)商設(shè)備封裝： SC-70-5
包裝： 標(biāo)準(zhǔn)包裝
產(chǎn)品目錄頁(yè)面： 674 (CN2011-ZH PDF)
其它名稱(chēng)： MCP40D19T-503E/LTDKR
MCP40D17/18/19
DS22152B-page 30
2009 Microchip Technology Inc.
3.1
Positive Power Supply Input (VDD)
The VDD pin is the device’s positive power supply input.
The input power supply is relative to VSS and can range
from 1.8V to 5.5V. A de-coupling capacitor on VDD
(to VSS) is recommended to achieve maximum
performance.
While the device’s voltage is in the range of
1.8V
≤ V
DD < 2.7V, the Resistor Network’s electrical
performance of the device may not meet the data sheet
specifications.
3.2
Ground (VSS)
The VSS pin is the device ground reference.
3.3
I2C Serial Clock (SCL)
The SCL pin is the serial clock pin of the I2C interface.
The MCP40D17/18/19 acts only as a slave and the
SCL pin accepts only external serial clocks. The SCL
pin is an open-drain output. Refer to Section 5.0
Serial Interface communication.
3.4
I2C Serial Data (SDA)
The SDA pin is the serial data pin of the I2C interface.
The SDA pin has a Schmitt trigger input and an
open-drain output. Refer to Section 5.0 “Serial
Interface - I2C Module” for more details of I2C Serial
Interface communication.
3.5
Potentiometer Terminal B
The terminal B pin (available on some devices) is
connected to the internal potentiometer’s terminal B.
The potentiometer’s terminal B is the fixed connection
to the Zero Scale (0x00 tap) wiper value of the digital
potentiometer.
The terminal B pin is available on the MCP40D17
device. The terminal B pin does not have a polarity
relative to the terminal W pin. The terminal B pin can
support both positive and negative current. The voltage
on terminal B must be between VSS and VDD.
The terminal B pin is not available on the MCP40D18
and MCP40D19 devices. For these devices, the
potentiometer’s terminal B is internally connected to
VSS.
3.6
Potentiometer Wiper (W) Terminal
The terminal W pin is connected to the internal
potentiometer’s terminal W (the wiper). The wiper
terminal is the adjustable terminal of the digital
potentiometer. The terminal W pin does not have a
polarity relative to terminals A or B pins. The terminal
W pin can support both positive and negative current.
The voltage on terminal W must be between VSS and
VDD.
3.7
Potentiometer Terminal A
The terminal A pin (available on some devices) is
connected to the internal potentiometer’s terminal A.
The potentiometer’s terminal A is the fixed connection
to the Full Scale (0x7F tap) wiper value of the digital
potentiometer.
The terminal A pin is available on the MCP40D18
devices. The terminal A pin does not have a polarity
relative to the terminal W pin. The terminal A pin can
support both positive and negative current. The voltage
on terminal A must be between VSS and VDD.
The terminal A pin is not available on the MCP40D17
and MCP40D19 devices. For these devices, the
potentiometer’s terminal A is internally floating.
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