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參數資料
| 型號： | MCP3903T-E/SS |
| 廠商： | Microchip Technology |
| 文件頁數： | 12/15頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC AFE 24BIT 64KSPS 6CH 28SSOP |
| 產品培訓模塊： | MCP3903 6-Channel Energy Measurement Analog Front End |
| 標準包裝： | 2,100 |
| 位數： | 24 |
| 通道數： | 6 |
| 電壓 - 電源，模擬： | 4.5 V ~ 5.5 V |
| 電壓 - 電源，數字： | 2.7 V ~ 3.6 V |
| 封裝/外殼： | 28-SSOP（0.209"，5.30mm 寬） |
| 供應商設備封裝： | 28-SSOP |
| 包裝： | 帶卷 (TR) |
MCP3903
DS25048B-page 6
2011 Microchip Technology Inc.
1.2
SERIAL INTERFACE CHARACTERISTICS
SERIAL INTERFACE SPECIFICATIONS
Electrical Specifications:
Unless otherwise indicated, all parameters apply at AVDD = 4.5 to 5.5V,
DVDD = 2.7 to 3.6V, -40°C < TA <+125°C, CLOAD = 30 pF.
Parameters
Sym
Min
Typ
Max
Units
Conditions
Serial Clock frequency
fSCK
——
10
MHz 2.7
≤ DVDD < 3.6
CS setup time
tCSS
50
—
ns
2.7
≤ DVDD < 3.6
CS hold time
tCSH
100
—
ns
2.7
≤ DVDD < 3.6
CS disable time
tCSD
50
—
ns
—
Data setup time
tSU
10
—
ns
2.7
≤ DVDD < 3.6
Data hold time
t
HD
20
—
ns
2.7
≤ DVDD < 3.6
Serial Clock high time
t
HI
40
—
ns
2.7
≤ DVDD < 3.6
Serial Clock low time
t
LO
40
—
ns
2.7
≤ DVDD < 3.6
Serial Clock delay time
t
CLD
50
—
ns
—
Serial Clock enable time
t
CLE
50
—
ns
—
Output valid from SCK low
t
DO
—
50
ns
2.7
≤ DVDD < 3.6
Output hold time
t
HO
0—
—
ns
Output disable time
t
DIS
—
50
ns
2.7
≤ DVDD < 3.6
Reset Pulse Width (RESET)tMCLR
100
—
ns
2.7
≤ DVDD < 3.6
Data Transfer Time to DR (Data Ready) tDODR
—50
ns
2.7
≤ DVDD < 3.6
Data Ready Pulse Low Time
tDRP
1/
DMCLK
—s
2.7
≤ DVDD < 3.6
Schmitt Trigger High-level Input voltage
(All digital inputs)
VIH1
.7 DVDD
—DVDD +1
V
Schmitt Trigger Low-level input voltage
(All digital inputs)
VIL1
-0.3
—
0.25
DVDD
V
Hysteresis of Schmitt Trigger Inputs
(All digital inputs)
VHYS
50
—
mV
Low-level output voltage, SDO pin
VOL
—
0.4
V
SDO pin only, IOL = 2 mA,
DVDD = 3.3V
Low-level output voltage, DRn pins
VOL
0.4
V
DRn pins only,
IOL = +1.5 mA, DVDD =3.3V
High-level output voltage, SDO pin
VOH
DVDD -
0.5
—
V
SDO pin only,
IOH = -2 mA, DVDD = 3.3V
High-level output voltage, DRn pins
only
VOH
DVDD -
0.5
——
V
DRn pins only,
IOH = -1.5 mA, DVDD=3.3V
Input leakage current
ILI
—
±1
A
CS = DVDD, Inputs tied to
DVDD OR DGND
Output leakage current
ILO
—
±1
A
CS = DVDD, Inputs tied to
DVDD OR DGND
Internal capacitance (all inputs and
outputs)
CINT
——
7
pF
TA = 25°C, SCK = 1.0 MHz
Note 1:
This parameter is periodically sampled and not 100% tested.
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