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參數(shù)資料
| 型號： | MCP3424EV |
| 廠商： | Microchip Technology |
| 文件頁數(shù)： | 19/58頁 |
| 文件大?。?/td> | 0K |
| 描述： | EVALUATION BOARD FOR MCP3424 |
| 產(chǎn)品培訓(xùn)模塊： | MCP3901 Analog Front End |
| 標(biāo)準(zhǔn)包裝： | 1 |
| ADC 的數(shù)量： | 1 |
| 位數(shù)： | 18 |
| 采樣率（每秒）： | 3.75 ~ 240 |
| 數(shù)據(jù)接口： | I²C |
| 輸入范圍： | ±2.048 V |
| 在以下條件下的電源（標(biāo)準(zhǔn)）： | 135µA @ 240sps |
| 工作溫度： | -55°C ~ 125°C |
| 已用 IC / 零件： | MCP3424 |
| 已供物品： | 板 |
| 產(chǎn)品目錄頁面： | 672 (CN2011-ZH PDF) |
| 相關(guān)產(chǎn)品： | MCP3424T-E/STTR-ND - IC ADC 18BIT 3.75SPS 4CH 14TSSOP MCP3424T-E/SLTR-ND - IC ADC 18BIT 3.75SPS 4CH 14-SOIC MCP3424-E/ST-ND - IC ADC 18BIT 3.75SPS 4CH 14TSSOP MCP3424-E/SL-ND - IC ADC 18BIT 3.75SPS 4CH 14-SOIC |
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MCP3422/3/4
DS22088C-page 26
2009 Microchip Technology Inc.
5.6.5
ACKNOWLEDGE AND NON-
ACKNOWLEDGE
The Master (microcontroller) and the slave (MCP3422/
3/4) use an acknowledge pulse as a hand shake of
communication for each byte. The ninth clock pulse of
each byte is used for the acknowledgement. The clock
pulse
is
always
provided
by
the
Master
(microcontroller) and the acknowledgement is issued
by the receiving device of the byte (Note: The
transmitting device must release the SDA line during
the acknowledge pulse.). The acknowledgement is
achieved by pulling-down the SDA line “LOW” during
the 9th clock pulse by the receiving device.
During
reads,
the
Master
(microcontroller)
can
terminate the current read operation by not providing
an acknowledge bit (not Acknowledge (NAK)) on the
last byte. In this case, the MCP3422/3/4 devices
release
the
SDA
line
to
allow
the
Master
(microcontroller) to generate a STOP or repeated
START condition.
The
non-acknowledgement
(NAK)
is
issued
by
providing the SDA line to “HIGH” during the 9th clock
pulse.
FIGURE 5-7:
Data Transfer Sequence on I2C Serial Bus.
SCL
SDA
(A)
(B)
(D)
(A)
(C)
START
CONDITION
ADDRESS OR
ACKNOWLEDGE
VALID
DATA
ALLOWED
TO CHANGE
STOP
CONDITION
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