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參數(shù)資料
| 型號： | MCP3304 |
| 廠商： | Microchip Technology Inc. |
| 英文描述： | 13-Bit Differential Input, Low Power A/D Converter with SPI Serial Interface |
| 中文描述： | 13位差分輸入，低功耗的A / D轉換器具有SPI串行接口 |
| 文件頁數(shù)： | 17/40頁 |
| 文件大小： | 666K |
| 代理商： | MCP3304 |
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2002 Microchip Technology Inc.
DS21697B-page 17
MCP3302/04
6.0
APPLICATIONS INFORMATION
6.1
Conversion Description
The MCP3302/04 A/D converters employ a conven-
tional SAR architecture. With this architecture, the
potential between the IN+ and IN- inputs are simulta-
neously sampled and stored with the internal sample
circuits for 1.5 clock cycles. Following this sampling
time, the input hold switches of the converter open and
the device uses the collected charge to produce a
serial 13-bit binary two’s complement output code. This
conversion process is driven by the external clock and
must include 13 clock cycles, one for each bit. During
this process, the most significant bit (MSB) is output
first. This bit is the sign bit and indicates if the IN+ or IN-
input is at a higher potential.
FIGURE 6-1:
Simplified Block Diagram.
6.2
Driving the Analog Input
The analog input of the MCP3302/04 is easily driven,
either differentially or single ended. Any signal that is
common to the two input channels will be rejected by
the common mode rejection of the device. During the
charging time of the sample capacitor, a small charging
current will be required. For low source impedances,
this input can be driven directly. For larger source
impedances, a larger acquisition time will be required
due to the RC time constant that includes the source
impedance. For the A/D Converter to meet specifica-
tion, the charge holding capacitor (C
SAMPLE
) must be
given enough time to acquire a 13-bit accurate voltage
level during the 1.5 clock cycle acquisition period.
An analog input model is shown in Figure 6-3. This
model is accurate for an analog input, regardless if it is
configured as a single ended input, or the IN+ and IN-
input in differential mode. In this diagram, it is shown
that the source impedance (R
S
) adds to the internal
sampling switch (R
SS
) impedance, directly affecting the
time that is required to charge the capacitor (C
SAMPLE
).
Consequently, a larger source impedance with no addi-
tional acquisition time increases the offset, gain and
integral linearity errors of the conversion. To overcome
this, a slower clock speed can be used to allow for the
longer charging time. Figure 6-2 shows the maximum
clock speed associated with source impedances.
FIGURE 6-2:
vs. Source Resistance (R
S
) to maintain ±1 LSB
INL.
Maximum Clock Frequency
Comp
13-Bit SAR
CDAC
IN+
IN-
Shift
Register
C
SAMP
Hold
+
-
Hold
C
SAMP
D
OUT
0.0
0.5
1.0
1.5
2.0
2.5
100
1000
10000
100000
Source Resistance (ohms)
M
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| MCP3304-BI/P | 功能描述:模數(shù)轉換器 - ADC 13-bit Diff In 4 Chl RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| MCP3304-BI/SL | 功能描述:模數(shù)轉換器 - ADC 13-bit Diff In 4 Chl RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| MCP3304-BI/ST | 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:13-Bit Differential Input, Low Power A/D Converter with SPI Serial Interface |
| MCP3304-CI/P | 功能描述:模數(shù)轉換器 - ADC 13-bit Diff In 4 Chl RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| MCP3304-CI/SL | 功能描述:模數(shù)轉換器 - ADC 13-bit Diff In 4 Chl RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
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