參數(shù)資料
型號: MCM63R819
廠商: Motorola, Inc.
英文描述: 4MBit Synchronous Late Write Fast Static RAM(4M位同步遲寫快速靜態(tài)RAM)
中文描述: 晚寫的4Mb同步快速靜態(tài)存儲器(4分位同步遲寫快速靜態(tài)內(nèi)存)
文件頁數(shù): 8/21頁
文件大?。?/td> 311K
代理商: MCM63R819
MCM63R736
MCM63R818
8
MOTOROLA FAST SRAM
AC OPERATING CONDITIONS AND CHARACTERISTICS
(2.375 V
VDD
3.6 V, 0
°
C
TA
70
°
C, Unless Otherwise Noted)
Input Pulse Levels
Input Rise/Fall Time
Input Timing Measurement Reference Level
Output Timing Reference Level
0.25 to 1.25 V
1 V/ns (20% to 80%)
. . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . .
0.75 V
0.75 V
. . . . . . . . . . . . . . . . . . . . . . . . .
Clock Input Timing Reference Level
ZQ for 50
Impedance
R
θ
JA Device
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Differential Cross–Point
. . . . . .
250
22 C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
READ/WRITE CYCLE TIMING
(See Note 1)
63R736–3
63R818–3
63R736–3.3
63R818–3.3
63R736–3.7
63R818–3.7
63R736–4
63R818–4
63R736–4.4
63R818–4.4
63R736–5
63R818–5
Parameter
Symbol
Min
Max
Min
Max
Min
Max
Min
Max
Min
Max
Min
Max
Unit
Notes
Cycle Time
tKHKH
tKHKL
tKLKH
tKHQX1
3
3.3
3.7
4
4.4
5
ns
Clock High Pulse Width
1.2
1.2
1.5
1.5
1.5
2
ns
Clock Low Pulse Width
1.2
1.2
1.5
1.5
1.5
2
ns
Clock High to Output
Low–Z
0.5
0.5
0.5
0.5
1
1
ns
1, 2
Clock High to Output
Valid
tKHQV
1.5
1.65
1.85
2
2.2
2.5
ns
Clock High to Output
Hold
tKHQX
0.5
0.5
0.5
0.5
0.5
0.5
ns
1
Clock High to Output
High–Z
tKHQZ
1.5
1.65
1.85
2
2.2
2.5
ns
1, 3
ZZ High to Sleep Mode
tZZE
tZZR
tAVKH
tDVKH
tSVKH
tWVKH
tKHAX
tKHDX
tKHSX
tKHWX
3
3.3
3.7
4
4.4
5
ns
ZZ Low to Recovery
10
10
10
10
10
10
ns
Setup Times:
Address
Data In
Chip Select
Write Enable
0.5
0.5
0.5
0.5
0.5
0.5
ns
Hold Times:
Address
Data In
Chip Select
Write Enable
0.5
0.5
0.5
0.5
0.75
0.75
ns
NOTES:
1. This parameter is sampled and not 100% tested.
2. Measured at
±
200 mV from steady state.
3. Measured at
±
200 mV from steady state. See Test Load Figure 1b.
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