參數(shù)資料
型號: MCIMX31_07
廠商: 飛思卡爾半導(dǎo)體(中國)有限公司
英文描述: Multimedia Applications Processors
中文描述: 多媒體應(yīng)用處理器
文件頁數(shù): 97/108頁
文件大?。?/td> 1235K
代理商: MCIMX31_07
Electrical Characteristics
i.MX31/i.MX31L Advance Information, Rev. 2.3
Freescale Semiconductor
97
4.3.23
USB Electrical Specifications
This section describes the electrical information of the USBOTG port. The OTG port supports both serial
and parallel interfaces.
The high speed (HS) interface is supported via the ULPI (Ultra Low Pin Count Interface).
Figure 83
depicts the USB ULPI timing diagram, and
Table 60
lists the timing parameters.
Figure 83. USB ULPI Interface Timing Diagram
SS28
(Rx) CK high to FS (bl) high
-10.0
15.0
ns
SS30
(Rx) CK high to FS (bl) low
10.0
ns
SS32
(Rx) CK high to FS (wl) high
-10.0
15.0
ns
SS34
(Rx) CK high to FS (wl) low
10.0
ns
SS35
(Tx/Rx) External FS rise time
6.0
ns
SS36
(Tx/Rx) External FS fall time
6.0
ns
SS40
SRXD setup time before (Rx) CK low
10.0
ns
SS41
SRXD hold time after (Rx) CK low
2.0
ns
Table 60. USB ULPI Interface Timing Specification
1
1
Timing parameters are given as viewed by transceiver side.
Parameter
Symbol
Min
Max
Units
Setup time (control in, 8-bit data in)
T
SC
, T
SD
6
ns
Hold time (control in, 8-bit data in)
T
HC
, T
HD
0
ns
Output delay (control out, 8-bit data out)
T
DC
, T
DD
9
ns
Table 59. SSI Receiver with External Clock Timing Parameters (continued)
ID
Parameter
Min
Max
Unit
Clock
Control out (stp)
Data out
Control in (dir, nxt)
Data in
T
DD
T
DC
T
DC
T
SC
T
SD
T
HD
T
HC
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