參數(shù)資料
型號(hào): MCIMX27MOP4A
廠商: Freescale Semiconductor
文件頁數(shù): 108/152頁
文件大?。?/td> 0K
描述: IC MPU I.MX27 19X19 473MAPBGA
標(biāo)準(zhǔn)包裝: 84
系列: i.MX27
核心處理器: ARM9
芯體尺寸: 32-位
速度: 400MHz
連通性: 1 線,CAN,EBI/EMI,以太網(wǎng),I²C,MMC,智能卡,SPI,SSI,UART/USART,USB OTG
外圍設(shè)備: DMA,LCD,POR,PWM,WDT
程序存儲(chǔ)器類型: ROMless
RAM 容量: 45K x 8
電壓 - 電源 (Vcc/Vdd): 1.38 V ~ 1.52 V
振蕩器型: 外部
工作溫度: -40°C ~ 85°C
封裝/外殼: 473-LFBGA
包裝: 托盤
i.MX27 and i.MX27L Data Sheet, Rev. 1.8
Freescale Semiconductor
59
Electrical Characteristics
4.3.2.3
MII Asynchronous Inputs Signal Timing (FEC_CRS and FEC_COL)
Figure 19 shows the MII asynchronous input timings, and Table 27 lists the timing parameters.
Figure 19. MII Asynchronous Inputs Signal Timing Diagram
4.3.2.4
MII Serial Management Channel Timing (FEC_MDIO and FEC_MDC)
The FEC functions correctly with a maximum MDC frequency of 2.5 MHz. The MDC frequency should
be equal to or less than 2.5 MHz to be compliant with IEEE 802.3 MII specification. However the FEC
can function correctly with a maximum MDC frequency of 15 MHz.
Figure 20 shows the MII serial management channel timings, and Table 28 lists the timing parameters.
Figure 20. MII Serial Management Channel Timing Diagram
Table 27. MII Asynchronous Inputs Signal Timing Parameter
ID
Parameter
Min
Max
Unit
M91
1
FEC_COL has the same timing in 10 Mbit 7-wire interface mode.
FEC_CRS to FEC_COL minimum pulse width
1.5
FEC_TX_CLK period
Note:
FEC_CRS, FEC_COL
M9
FEC_MDC (output)
FEC_MDIO (output)
M14
M15
M10
M11
M12
M13
FEC_MDIO (input)
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