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參數(shù)資料
| 型號(hào)： | MCF5407FT162 |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, 162 MHz, RISC PROCESSOR, PQFP208 |
| 封裝： | 28 X 28 MM, 0.50 MM PITCH, PLASTIC, FQFP-208 |
| 文件頁數(shù)： | 34/35頁 |
| 文件大?。?/td> | 441K |
| 代理商： | MCF5407FT162 |
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MCF5407 Integrated ColdFire Microprocessor Product Brief
MOTOROLA
ColdFire Module Description
1.3.2
Harvard Architecture
A Harvard memory architecture is implemented to support the increased bandwidth requirements of the V4
processor pipelines. In this design featuring separate instruction and data buses to the processor-local
memories, available bandwidth to the processor reaches 1.3 Gbytes/S at 162 MHz and conflicts between
instruction fetches and operand accesses are removed.
1.3.2.1
16-Kbyte Instruction Cache/8-Kbyte Data Cache
Attached to the Harvard memory architecture are a 16-Kbyte instruction cache and an 8-Kbyte data cache.
These four-way, set-associative designs improve system performance by providing pipelined, single-cycle
access on instruction fetches and operand accesses that hit in these memories.
As with all ColdFire caches, these controllers implement a non-lockup, streaming design to maximize
performance. The use of processor-local memories decouples performance from external memory speeds
and increases available bandwidth for external devices or the on-chip 4-channel DMA.
Both caches implement line-fill buffers to optimize the performance of line-sized (16-byte) burst accesses.
Additionally, the data cache supports operation of copyback, write-through or noncacheable modes. A
4-entry, 32-bit buffer is used for cache line push operations and can be configured for deferred write
buffering while in write-through or non-cacheable modes.
The new INTOUCH instruction can be used to prefetch instructions to be locked in the instruction cache
using the cache locking feature. This function may be desirable in certain systems where deterministic
real-time performance is critical.
1.3.2.2
Internal 2-Kbyte SRAMs
The two 2-Kbyte on-chip SRAM modules are also connected to the Harvard memory architecture, and
provide pipelined, single-cycle access to those memory regions mapped to these devices. Each memory can
be independently mapped to any 0-modulo-2K location within the 4-Gbyte address space, and configured
to respond either to instruction or to data accesses. Time-critical functions can be mapped onto the
instruction memory bus, while the system stack and/or heavily-referenced data operands can be mapped
onto the data memory bus.
1.3.3
DRAM Controller
The MCF5407 DRAM controller provides a direct interface for up to two blocks of DRAM. The controller
supports 8-, 16-, or 32-bit memory widths, and can easily interface to PC-100 DIMMs. A unique addressing
scheme allows for increases in system memory size without rerouting address lines and rewiring boards.
The controller operates in normal mode or in page mode and supports SDRAMs and EDO DRAMs.
1.3.4
DMA Controller
The MCF5407 provides four fully-programmable DMA channels for quick data transfer. Dual- and
single-address modes provide the ability to program bursting and cycle steal. Data transfers are 32 bits long
with packing and unpacking supported along with an auto-alignment option for efficient block transfers.
Automatic block transfers from on-chip serial UARTs are also supported through the DMA channels.
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PDF描述 |
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| MCF5407FT220 | 32-BIT, 220 MHz, RISC PROCESSOR, PQFP208 |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MCF5407FT220 | 功能描述:IC MPU 32B 220MHZ COLDF 208-FQFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:MCF540x 標(biāo)準(zhǔn)包裝:250 系列:56F8xxx 核心處理器:56800E 芯體尺寸:16-位 速度:60MHz 連通性:CAN，SCI，SPI 外圍設(shè)備:POR，PWM，溫度傳感器，WDT 輸入/輸出數(shù):21 程序存儲(chǔ)器容量:40KB（20K x 16） 程序存儲(chǔ)器類型:閃存 EEPROM 大小:- RAM 容量:6K x 16 電壓 - 電源 (Vcc/Vdd):2.25 V ~ 3.6 V 數(shù)據(jù)轉(zhuǎn)換器:A/D 6x12b 振蕩器型:內(nèi)部 工作溫度:-40°C ~ 125°C 封裝/外殼:48-LQFP 包裝:托盤 配用:MC56F8323EVME-ND - BOARD EVALUATION MC56F8323 |
| MCF54410CMF250 | 制造商:Freescale Semiconductor 功能描述:MCF54410CMF250 - Bulk |
| MCF54415CMJ250 | 功能描述:微處理器 - MPU COLDFIREV4M CORE C90LP RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:536 MHz 程序存儲(chǔ)器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324 |
| MCF54415CMJ250 | 制造商:Freescale Semiconductor 功能描述:IC 32-BIT MCU COLDFIRE 250MHZ 256-MA |
| MCF54416CMJ250 | 功能描述:微處理器 - MPU COLDFIREV4M CORE C90LP RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:536 MHz 程序存儲(chǔ)器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324 |
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