參數(shù)資料
型號(hào): MCF52233CAF60
廠商: Freescale Semiconductor
文件頁數(shù): 20/55頁
文件大?。?/td> 0K
描述: IC MCU 32BIT 256K FLASH 80-LQFP
標(biāo)準(zhǔn)包裝: 90
系列: MCF5223x
核心處理器: Coldfire V2
芯體尺寸: 32-位
速度: 60MHz
連通性: 以太網(wǎng),I²C,SPI,UART/USART
外圍設(shè)備: DMA,LVD,POR,PWM,WDT
輸入/輸出數(shù): 73
程序存儲(chǔ)器容量: 256KB(256K x 8)
程序存儲(chǔ)器類型: 閃存
RAM 容量: 32K x 8
電壓 - 電源 (Vcc/Vdd): 3 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x12b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 80-LQFP
包裝: 托盤
配用: M52233DEMO-ND - BOARD DEMO FOR MCF52233
MCF52235 Family Configurations
MCF52235 ColdFire Microcontroller Data Sheet, Rev. 10
Freescale Semiconductor
27
1.16
EzPort Signal Descriptions
Table 17 contains a list of EzPort external signals
Table 17. EzPort Signal Descriptions
1.17
Power and Ground Pins
The pins described in Table 18 provide system power and ground to the chip. Multiple pins are provided for adequate current
capability. All power supply pins must have adequate bypass capacitance for high-frequency noise suppression.
Some of the VDD and VSS pins on the device are only to be used for noise bypass. Figure 5 shows a typical connection diagram.
Pay particular attention to those pins which show only capacitor connections. Do not connect power supply voltage directly to
these pins.
Signal Name
Abbreviation
Function
I/O
EzPort Clock
EZPCK
Shift clock for EzPort transfers
I
EzPort Chip Select
EZPCS
Chip select for signalling the start and end
of serial transfers
I
EzPort Serial Data In
EZPD
EZPD is sampled on the rising edge of
EZPCK
I
EzPort Serial Data Out
EZPQ
EZPQ transitions on the falling edge of
EZPCK
O
Table 18. Power and Ground Pins
Signal Name
Abbreviation
Function
I/O
PLL Analog Supply
VDDPLL,
VSSPLL
Dedicated power supply signals to isolate the sensitive PLL analog
circuitry from the normal levels of noise present on the digital power
supply.
I
Positive Supply
VDD
These pins supply positive power to the core logic.
I
Ground
VSS
This pin is the negative supply (ground) to the chip.
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