參數(shù)資料
型號： MCF51QH128VLF
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： FLASH, 50 MHz, MICROCONTROLLER, PQFP48
封裝： 7 X 7 MM, LQFP-48
文件頁數(shù)： 25/72頁
文件大小： 1031K
代理商： MCF51QH128VLF
Table 21. EzPort switching specifications (continued)
Num
Description
Min.
Max.
Unit
EP6
EZP_CK high to EZP_D input invalid (hold)
0.0
—
ns
EP7
EZP_CK low to EZP_Q output valid (setup)
—
25
ns
EP8
EZP_CK low to EZP_Q output invalid (hold)
0.0
—
ns
EP9
EZP_CS negation to EZP_Q tri-state
—
12
ns
EP2
EP3
EP4
EP5
EP6
EP7
EP8
EP9
EZP_CK
EZP_CS
EZP_Q (output)
EZP_D (input)
Figure 6. EzPort Timing Diagram
6.4.3 Mini-Flexbus Switching Specifications
All processor bus timings are synchronous; input setup/hold and output delay are given in
respect to the rising edge of a reference clock, FB_CLK. The FB_CLK frequency may be
the same as the internal system bus frequency or an integer divider of that frequency.
The following timing numbers indicate when data is latched or driven onto the external
bus, relative to the Mini-Flexbus output clock (FB_CLK). All other timing relationships
can be derived from these values.
Table 22. Flexbus switching specifications
Num
Description
Min.
Max.
Unit
Notes
Operating voltage
2.7
3.6
V
Frequency of operation
—
25
MHz
FB1
Clock period
20
—
ns
Table continues on the next page...
Memories and memory interfaces
MCF51JF128 Advance Information Data Sheet, Rev. 3, 08/2011.
Freescale Semiconductor, Inc.
Preliminary
31
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