參數(shù)資料
型號: MC9SDG128BMPVR2
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 16-BIT, FLASH, 25 MHz, MICROCONTROLLER, PQFP112
封裝: 20 X 20 MM, 1.40 MM HEIGHT, 0.65 MM PITCH, LQFP-112
文件頁數(shù): 23/128頁
文件大?。?/td> 2002K
代理商: MC9SDG128BMPVR2
MC9S12DT128B Device User Guide — V01.09
117
A.8 External Bus Timing
A timing diagram of the external multiplexed-bus is illustrated in Figure A-9 with the actual timing
values shown on table Table A-20. All major bus signals are included in the diagram. While both a data
write and data read cycle are shown, only one or the other would occur on a particular bus cycle.
A.8.1 General Muxed Bus Timing
The expanded bus timings are highly dependent on the load conditions. The timing parameters shown
assume a balanced load across all outputs.
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