參數(shù)資料
型號(hào): MC9S12XEP100F1CAL
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 32-BIT, FLASH, 50 MHz, RISC MICROCONTROLLER, PQFP112
封裝: LQFP-112
文件頁數(shù): 280/1324頁
文件大?。?/td> 8453K
代理商: MC9S12XEP100F1CAL
Chapter 2 Port Integration Module (S12XEPIMV1)
MC9S12XE-Family Reference Manual , Rev. 1.21
Freescale Semiconductor
125
2.3.29
Port S Data Register (PTS)
Address 0x0248
Access: User read/write(1)
1. Read: Anytime.
Write: Anytime.
76543210
R
PTS7
PTST6
PTS5
PTS4
PTS3
PTS2
PTS1
PTS0
W
Altern.
Function
SS0
SCK0
MOSI0
MISO0
TXD1
RXD1
TXD0
RXD0
Reset
00000000
Figure 2-27. Port S Data Register (PTS)
Table 2-26. PTS Register Field Descriptions
Field
Description
7
PTS
Port S general purpose input/output data—Data Register
Port S pin 7 is associated with the SS signal of the SPI0 module.
When not used with the alternative function, this pin can be used as general purpose I/O.
If the associated data direction bit of this pin is set to 1, a read returns the value of the port register, otherwise the
buffered pin input state is read.
6
PTS
Port S general purpose input/output data—Data Register
Port S pin 6 is associated with the SCK signal of the SPI0 module.
When not used with the alternative function, this pin can be used as general purpose I/O.
If the associated data direction bit of this pin is set to 1, a read returns the value of the port register, otherwise the
buffered pin input state is read.
5
PTS
Port S general purpose input/output data—Data Register
Port S pin 5 is associated with the MOSI signal of the SPI0 module.
When not used with the alternative function, this pin can be used as general purpose I/O.
If the associated data direction bit of this pin is set to 1, a read returns the value of the port register, otherwise the
buffered pin input state is read.
4
PTS
Port S general purpose input/output data—Data Register
Port S pin 4 is associated with the MISO signal of the SPI0 module.
When not used with the alternative function, this pin can be used as general purpose I/O.
If the associated data direction bit of this pin is set to 1, a read returns the value of the port register, otherwise the
buffered pin input state is read.
3
PTS
Port S general purpose input/output data—Data Register
Port S pin 3 is associated with the TXD signal of the SCI1 module.
When not used with the alternative function, this pin can be used as general purpose I/O.
If the associated data direction bit of this pin is set to 1, a read returns the value of the port register, otherwise the
buffered pin input state is read.
2
PTS
Port S general purpose input/output data—Data Register
Port S bits 2 is associated with the RXD signal of the SCI1 module.
When not used with the alternative function, this pin can be used as general purpose I/O.
If the associated data direction bit of this pin is set to 1, a read returns the value of the port register, otherwise the
buffered pin input state is read.
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