3 This specification applies to any time the" />
參數(shù)資料
型號： MC9S08JE64CLH
廠商： Freescale Semiconductor
文件頁數(shù)： 24/44頁
文件大小： 0K
描述： IC MCU 8BIT 64K FLASH 64LQFP
標準包裝： 160
系列： S08
核心處理器： S08
芯體尺寸： 8-位
速度： 48MHz
連通性： I²C，SCI，SPI，USB
外圍設備： LVD，POR，PWM，WDT
輸入/輸出數(shù)： 33
程序存儲器容量： 64KB（64K x 8）
程序存儲器類型： 閃存
RAM 容量： 12K x 8
電壓 - 電源 (Vcc/Vdd)： 1.8 V ~ 3.6 V
數(shù)據(jù)轉換器： A/D 6x12b
振蕩器型： 內部
工作溫度： -40°C ~ 85°C
封裝/外殼： 64-LQFP
包裝： 托盤
Preliminary Electrical Characteristics
Freescale Semiconductor
30
3 This specification applies to any time the PLL VCO divider or reference divider is changed, or changing from PLL
disabled (BLPE, BLPI) to PLL enabled (PBE, PEE). If a crystal/resonator is being used as the reference, this
specification assumes it is already running.
4 Jitter is the average deviation from the programmed frequency measured over the specified interval at maximum f
BUS.
Measurements are made with the device powered by filtered supplies and clocked by a stable external clock signal.
Noise injected into the FLL circuitry via VDD and VSS and variation in crystal oscillator frequency increase the CJitter
percentage for a given interval.
5 625 ns represents 5 time quanta for CAN applications, under worst-case conditions of 8 MHz CAN bus clock, 1 Mbps
CAN Bus speed, and 8 time quanta per bit for bit time settings. 5 time quanta is the minimum time between a
synchronization edge and the sample point of a bit using 8 time quanta per bit.
6 Below D
lock minimum, the MCG is guaranteed to enter lock. Above Dlock maximum, the MCG will not enter lock. But
if the MCG is already in lock, then the MCG may stay in lock.
7 Below D
unl minimum, the MCG will not exit lock if already in lock. Above Dunl maximum, the MCG is guaranteed to exit
lock.
Table 18. XOSC (Temperature Range = –40 to 105°C Ambient)
#
Characteristic
Symbol
Min
Typ1
Max
Unit
1
Oscillator crystal or resonator
(EREFS = 1, ERCLKEN = 1)
Low range (RANGE = 0)
flo
32
—
38.4
kHz
High range (RANGE = 1),
FEE or FBE mode 2
fhi
1
—
5
MHz
High range (RANGE = 1),
High gain (HGO = 1),
FBELP mode
fhi
1
—
16
MHz
High range (RANGE = 1),
Low power (HGO = 0),
FBELP mode
fhi
1
—
8
MHz
2
Load capacitors
C1
C2
See Note 3
3
Feedback resistor
Low range
(32 kHz to 38.4 kHz)
RF
—
10
—
M
Ω
High range
(1 MHz to 16 MHz)
——
1
—
4
Series resistor — Low range
Low Gain (HGO = 0)
RS
—0
—
k
Ω
High Gain (HGO = 1)
—
100
—
5
Series resistor — High range
Low Gain (HGO = 0)
k
Ω
High Gain (HGO = 1)
≥ 8 MHz
RS
—0
0
4 MHz
—
0
10
1 MHz
—
0
20
Preliminary — Subject to Change
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