參數(shù)資料
型號: MC9RS08KA1CDBR
廠商: Freescale Semiconductor
文件頁數(shù): 114/136頁
文件大小: 0K
描述: IC CPU RS08 1K FLASH 62RAM 6-DFN
產(chǎn)品培訓模塊: USBSpyder08 Discovery Kit
MC9RS08KA8 Microcontroller
標準包裝: 2,500
系列: RS08
核心處理器: RS08
芯體尺寸: 8-位
速度: 10MHz
外圍設(shè)備: LVD,POR,WDT
輸入/輸出數(shù): 2
程序存儲器容量: 1KB(1K x 8)
程序存儲器類型: 閃存
RAM 容量: 63 x 8
電壓 - 電源 (Vcc/Vdd): 1.8 V ~ 5.5 V
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 6-VDFN 裸露焊盤
包裝: 帶卷 (TR)
Internal Clock Source (RS08ICSV1)
MC9RS08KA2 Series Data Sheet, Rev. 4
Freescale Semiconductor
79
9.3.3
ICS Trim Register (ICSTRM)
9.3.4
ICS Status and Control (ICSSC)
7
6
5
432
1
0
R
TRIM
W
POR:
1
0
Reset:
U
UUU
U
Figure 9-5. ICS Trim Register (ICSTRM)
Table 9-4. ICSTRM Field Descriptions
Field
Description
7:0
TRIM
ICS Trim Setting — The TRIM bits control the internal reference clock frequency by controlling the internal
reference clock period. The bits’ effect are binary weighted (i.e., bit 1 will adjust twice as much as bit 0).
Increasing the binary value in TRIM will increase the period, and decreasing the value will decrease the period.
An additional fine trim bit is available in ICSSC as the FTRIM bit.
7
6
5
432
1
0
R
0
CLKST
0
FTRIM
W
POR:
0
Reset:
0
U
= Unimplemented
Figure 9-6. ICS Status and Control Register (ICSSC)
Table 9-5. ICSSC Field Descriptions
Field
Description
2
CLKST
Clock Mode Status — The CLKST read-only bit indicate the current clock mode. The CLKST bit does not update
immediately after a write to the CLKS bit due to internal synchronization between clock domains.
0 Output of FLL is selected
1 Internal reference clock is selected
0
FTRIM
ICS Fine Trim — The FTRIM bit controls the smallest adjustment of the internal reference clock frequency.
Setting FTRIM will increase the period and clearing FTRIM will decrease the period by the smallest amount
possible.
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