參數(shù)資料
型號: MC9RS08KA1CDB
廠商: Freescale Semiconductor
文件頁數(shù): 70/136頁
文件大小: 0K
描述: IC MCU 8-BIT 1K FLASH 6-DFN
產(chǎn)品培訓(xùn)模塊: Mechatronics
USBSpyder08 Discovery Kit
RS08KA2 Low-End Microcontroller Series
MC9RS08KA8 Microcontroller
標(biāo)準(zhǔn)包裝: 490
系列: RS08
核心處理器: RS08
芯體尺寸: 8-位
速度: 10MHz
外圍設(shè)備: LVD,POR,WDT
輸入/輸出數(shù): 2
程序存儲器容量: 1KB(1K x 8)
程序存儲器類型: 閃存
RAM 容量: 63 x 8
電壓 - 電源 (Vcc/Vdd): 1.8 V ~ 5.5 V
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 6-VDFN 裸露焊盤
包裝: 托盤
產(chǎn)品目錄頁面: 726 (CN2011-ZH PDF)
Chapter 5 Resets, Interrupts, and General System Control
MC9RS08KA2 Series Data Sheet, Rev. 4
Freescale Semiconductor
39
5.8.2
System Options Register (SOPT)
This high page register is a write-once register so only the first write after reset is honored. It can be read
at any time. Any subsequent attempt to write to SOPT (intentionally or unintentionally) is ignored to avoid
accidental changes to these sensitive settings. SOPT must be written during the user’s reset initialization
program to set the desired controls even if the desired settings are the same as the reset settings.
1. When the device is reset into normal operating mode (MS is high during reset), BKGDPE is reset to 1 if Flash security is
disengaged (SECD = 1); BKGDPE is reset to 0 if Flash security is engaged (SECD = 0). When the device is reset into active
BDM mode (MS is low during reset), BKGDPE is always reset to 1 such that BDM communication is allowed.
Table 5-2. SRS Field Descriptions
Field
Description
7
POR
Power-On Reset — Reset was caused by the power-on detection logic. Because the internal supply voltage was
ramping up at the time, the low-voltage reset (LVR) status bit is also set to indicate that the reset occurred while
the internal supply was below the LVR threshold.
0 Reset not caused by POR.
1 POR caused reset.
6
PIN
External Reset Pin — Reset was caused by an active-low level on the external reset pin.
0 Reset not caused by external reset pin.
1 External reset pin caused reset.
5
COP
Computer Operating Properly (COP) Watchdog — Reset was caused by the COP watchdog timer timing out.
This reset source can be blocked by COPE = 0.
0 Reset not caused by COP timeout.
1 COP timeout caused reset.
4
ILOP
Illegal Opcode — Reset was caused by an attempt to execute an unimplemented or illegal opcode. The STOP
instruction is considered illegal if stop is disabled by STOPE = 0 in the SOPT register. The BGND instruction is
considered illegal if active background mode is disabled by ENBDM = 0 in the BDCSC register.
0 Reset not caused by an illegal opcode.
1 An illegal opcode caused reset.
3
ILAD
Illegal Address — Reset was caused by an attempt to access either data or an instruction at an unimplemented
memory address.
0 Reset not caused by an illegal address.
1 An illegal address caused reset.
1
LVD
Low Voltage Detect — If the LVDRE bit is set and the supply drops below the LVD trip voltage, an LVD reset will
occur. This bit is also set by POR.
0 Reset not caused by LVD trip or POR.
1 Either LVD trip or POR caused reset.
76
54
321
0
R
COPE
COPT
STOPE
00
0
BKGDPE
RSTPE
W
Reset:
1
0
1 (Note 1)
u
POR:
110
00
0
1 (Note1)
0
= Unimplemented or Reserved
u = Unaffected
Figure 5-2. System Options Register 1 (SOPT)
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MC9RS08KA1CSC 功能描述:8位微控制器 -MCU 1K FLASH W/ ACMP 62 RAM RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
MC9RS08KA1CSCR 功能描述:8位微控制器 -MCU 1K FLASH W/ ACMP 62 RAM RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
MC9RS08KA1DB 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Microcontrollers