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參數(shù)資料
| 型號： | MC9328MXL15 |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, 150 MHz, MICROPROCESSOR, PBGA256 |
| 封裝： | 14 X 14 MM, 1.30 MM HEIGHT, 0.80 MM PITCH, MAPBGA-256 |
| 文件頁數(shù)： | 34/84頁 |
| 文件大小： | 1492K |
| 代理商： | MC9328MXL15 |
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4
MC9328MXL Advance Information
MOTOROLA
Signals and Connections
2 Signals and Connections
Table 2 identifies and describes the MC9328MXL signals that are assigned to package pins. The signals
are grouped by the internal module that they are connected to.
225-lead PBGA
150 MHz
0OC to 70OC
TBD
225-lead PBGA
200 MHz
0OC to 70OC
TBD
Table 2. MC9328MXL Signal Descriptions
Signal Name
Function/Notes
External Bus/Chip-Select (EIM)
A[24:0]
Address bus signals
D[31:0]
Data bus signals
EB0
MSB Byte Strobe—Active low external enable byte signal that controls D [31:24].
EB1
Byte Strobe—Active low external enable byte signal that controls D [23:16].
EB2
Byte Strobe—Active low external enable byte signal that controls D [15:8].
EB3
LSB Byte Strobe—Active low external enable byte signal that controls D [7:0].
OE
Memory Output Enable—Active low output enables external data bus.
CS [5:0]
Chip-Select—The chip-select signals CS [3:2] are multiplexed with CSD [1:0] and are
selected by the Function Multiplexing Control Register (FMCR). By default CSD [1:0] is
selected.
ECB
Active low input signal sent by a flash device to the EIM whenever the flash device must
terminate an on-going burst sequence and initiate a new (long first access) burst
sequence.
LBA
Active low signal sent by a flash device causing the external burst device to latch the
starting burst address.
BCLK
Clock signal sent to external synchronous memories (such as burst flash) during burst
mode.
RW
RW signal—Indicates whether external access is a read (high) or write (low) cycle. Used
as a WE input signal by external DRAM.
DTACK
DTACK signal— The external input data acknowledge signal. When using the external
DTACK signal as a data acknowledge signal, the bus time-out monitor generates a bus
error when a bus cycle is not terminated by the external DTACK signal after 1022 clock
counts have elapsed.
Table 1. MC9328MXL Ordering Information (Continued)
Package Type
Frequency
Temperature
Order Number
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| MC9328MXL20 | 32-BIT, 200 MHz, MICROPROCESSOR, PBGA256 |
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| MCA255-X017T | 1 CHANNEL DARLINGTON OUTPUT OPTOCOUPLER |
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| MC9328MXLCVF15 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:i.MX Integrated Portable System Processor |
| MC9328MXLCVH15 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:i.MX Integrated Portable System Processor |
| MC9328MXLCVM15 | 功能描述:處理器 - 專門應用 DRAGONBALL CORSICA PB-FR RoHS:否 制造商:Freescale Semiconductor 類型:Multimedia Applications 核心:ARM Cortex A9 處理器系列:i.MX6 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:1 GHz 指令/數(shù)據(jù)緩存: 數(shù)據(jù) RAM 大小:128 KB 數(shù)據(jù) ROM 大小: 工作電源電壓: 最大工作溫度:+ 95 C 安裝風格:SMD/SMT 封裝 / 箱體:MAPBGA-432 |
| MC9328MXLCVM15 | 制造商:Freescale Semiconductor 功能描述:Microprocessor |
| MC9328MXLCVM15R2 | 功能描述:處理器 - 專門應用 DRAGONBALL CORSICA PB-FR RoHS:否 制造商:Freescale Semiconductor 類型:Multimedia Applications 核心:ARM Cortex A9 處理器系列:i.MX6 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:1 GHz 指令/數(shù)據(jù)緩存: 數(shù)據(jù) RAM 大小:128 KB 數(shù)據(jù) ROM 大小: 工作電源電壓: 最大工作溫度:+ 95 C 安裝風格:SMD/SMT 封裝 / 箱體:MAPBGA-432 |
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