- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄359729 > MC9328MX21VM (Motorola, Inc.) i.MX family of microprocessors PDF資料下載
參數(shù)資料
| 型號： | MC9328MX21VM |
| 廠商： | Motorola, Inc. |
| 英文描述： | i.MX family of microprocessors |
| 中文描述： | i.MX系列微處理器 |
| 文件頁數(shù)： | 8/96頁 |
| 文件大小： | 1495K |
| 代理商： | MC9328MX21VM |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁當前第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁
MC9328MX1 Advance Information, Rev. 4
8
Freescale Semiconductor
Signals and Connections
TCK
Test Clock to synchronize test logic and control register access through the JTAG port.
TMS
Test Mode Select to sequence the JTAG test controller’s state machine. Sampled on the rising edge
of TCK.
System
BIG_ENDIAN
BIG_ENDIAN—This signal determines the memory endian configuration. BIG_ENDIAN is a static
pin to inner module. If the pin is driven logic-high the memory system is configured into big endian. If
it is driven logic-low the memory system is configured into little endian. The pin is not supposed to
be changed on the fly.
ETM
ETMTRACESYNC
ETM sync signal which is multiplexed with A24. ETMTRACESYNC is selected in ETM mode.
ETMTRACECLK
ETM clock signal which is multiplexed with A23. ETMTRACECLK is selected in ETM mode.
ETMPIPESTAT [2:0]
ETM status signals which are multiplex with A [22:20]. ETMPIPESTAT [2:0] are selected in ETM
mode.
ETMTRACEPKT [7:0]
ETM packet signals which are multiplex with ECB, LBA, BCLK (burst clock), PA17, A [19:16].
ETMTRACEPKT [7:0] are selected in ETM mode.
CMOS Sensor Interface
CSI_D [7:0]
Sensor port data
CSI_MCLK
Sensor port master clock
CSI_VSYNC
Sensor port vertical sync
CSI_HSYNC
Sensor port horizontal sync
CSI_PIXCLK
Sensor port data latch clock
LCD Controller
LD [15:0]
LCD Data Bus—All LCD signals are driven low after reset and when LCD is off.
FLM/VSYNC
Frame Sync or Vsync—This signal also serves as the clock signal output for gate.
driver (dedicated signal SPS for Sharp panel HR-TFT).
LP/HSYNC
Line Pulse or H Sync
LSCLK
Shift Clock
ACD/OE
Alternate Crystal Direction/Output Enable
CONTRAST
This signal is used to control the LCD bias voltage as contrast control.
SPL_SPR
Program horizontal scan direction (Sharp panel dedicated signal).
Table 3. Signal Names and Descriptions (Continued)
Signal Name
Function/Notes
相關PDF資料 |
PDF描述 |
|---|---|
| MC33886DH | 5.0 A H BRIDGE |
| MC33886DHR2 | 5.0 A H BRIDGE |
| MC33886VW | 5.0 A H BRIDGE |
| MC33886VWR2 | 5.0 A H BRIDGE |
| MC33288 | Solid State Relay for Automotive Flasher Applications |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| MC9328MX21VM | 制造商:Freescale Semiconductor 功能描述:Microprocessor |
| MC9328MX21VMR2 | 功能描述:處理器 - 專門應用 DB I.MX21 17X17 PB-FR RoHS:否 制造商:Freescale Semiconductor 類型:Multimedia Applications 核心:ARM Cortex A9 處理器系列:i.MX6 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:1 GHz 指令/數(shù)據(jù)緩存: 數(shù)據(jù) RAM 大小:128 KB 數(shù)據(jù) ROM 大小: 工作電源電壓: 最大工作溫度:+ 95 C 安裝風格:SMD/SMT 封裝 / 箱體:MAPBGA-432 |
| MC9328MXL | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:MX Family of applications processors |
| MC9328MXL/D | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:i.MX Integrated Portable System Processor |
| MC9328MXL_06 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:MX Family of applications processors |
發(fā)布緊急采購，3分鐘左右您將得到回復。