參數(shù)資料
型號: MC8641VU1250HC
廠商: Freescale Semiconductor
文件頁數(shù): 27/130頁
文件大小: 0K
描述: IC MPU SGL E600 CORE 994FCCBGA
標(biāo)準(zhǔn)包裝: 1
系列: MPC86xx
處理器類型: 32-位 MPC86xx PowerPC
速度: 1.25GHz
電壓: 1.05V
安裝類型: 表面貼裝
封裝/外殼: 994-BCBGA,F(xiàn)CCBGA
供應(yīng)商設(shè)備封裝: 994-FCCBGA(33x33)
包裝: 托盤
MPC8641 and MPC8641D Integrated Host Processor Hardware Specifications, Rev. 2
122
Freescale Semiconductor
System Design Information
The mechanical drawing for the single core device is located in Section 16.2, “Mechanical Dimensions of
For other pin pull-up or pull-down recommendations of signals, please see Section 17, “Signal Listings.”
20.7
Output Buffer DC Impedance
The MPC8641 drivers are characterized over process, voltage, and temperature. For all buses, the driver
is a push-pull single-ended driver type (open drain for I2C).
To measure Z0 for the single-ended drivers, an external resistor is connected from the chip pad to OVDD
or GND. Then, the value of each resistor is varied until the pad voltage is OVDD/2 (see Figure 66). The
output impedance is the average of two components, the resistances of the pull-up and pull-down devices.
When data is held high, SW1 is closed (SW2 is open) and RP is trimmed until the voltage at the pad equals
OVDD/2. RP then becomes the resistance of the pull-up devices. RP and RN are designed to be close to each
other in value. Then, Z0 = (RP + RN)/2.
Figure 66. Driver Impedance Measurement
Table 73 summarizes the signal impedance targets. The driver impedances are targeted at minimum VDD,
nominal OVDD, 105°C.
Table 73. Impedance Characteristics
Impedance
DUART, Control,
Configuration, Power
Management
PCI
Express
DDR DRAM
Symbol
Unit
RN
43 Target
25 Target
20 Target
Z0
W
RP
43 Target
25 Target
20 Target
Z0
W
Note: Nominal supply voltages. See Table 1, Tj = 105°C.
OVDD
OGND
RP
RN
Pad
Data
SW1
SW2
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