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參數(shù)資料
| 型號(hào)： | MC74LCX16501DT |
| 廠商： | MOTOROLA INC |
| 元件分類： | 通用總線功能 |
| 英文描述： | LOW-VOLTAGE CMOS 18-BIT UNIVERSAL BUS TRANSCEIVER |
| 中文描述： | LVC/LCX/Z SERIES, 18-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO56 |
| 封裝： | PLASTIC, TSSOP-56 |
| 文件頁(yè)數(shù)： | 3/10頁(yè) |
| 文件大?。?/td> | 159K |
| 代理商： | MC74LCX16501DT |
MC74LCX16501
LCX DATA
BR1339 — REV 3
3
MOTOROLA
FUNCTION TABLE
Inputs
Data
Ports
Operating Mode
OEAB
OEBA
LEAB
LEBA
CAB
CBA
An
Bn
L
H
Input
Input
L
L
H or L
H or L
X
X
Hold Data; A and B Outputs Disabled
↑
↑
l
h
l
h
Clock A and/or B Data; A and B Outputs Disabled
H
H
Input
Output
L
X
H or L
X*
X
QA
Hold and Display B Data
↑
X*
l
h
L
H
Clock A Data to B Bus; Store A Data
H
X
X
X*
L
H
L
H
A Data to B Bus; (Transparent)
L
L
Output
Input
X
L
X*
H or L
QB
X
Hold and Display A Data
X*
↑
L
H
l
h
Clock B Data to A Bus; Store B Data
X
H
X*
X
L
H
L
H
B Data to A Bus; (Transparent)
H
L
Output
Output
L
L
H or L
H or L
QB
QA
Stored A Data to B Bus; Stored B Data to A Bus
H = High Voltage Level; L = Low Voltage Level; h = High Voltage Level One Setup Time Prior to the Latch Enable or Clock Low–to–High Transition; l = Low Voltage
Level One Setup Time Prior to the Latch Enable or Clock Low–to–High Transition; X = Don’t Care;
↑
= Low–to–High Clock Transition; QA = A input storage register;
QB = B input storage register; * = The clocks are not internally gated with either the Output Enables or the Source Inputs. Therefore, data at the A or B ports may be
clocked into the storage registers, at any time. For ICC reasons, Do Not Float Inputs.
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