- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄371065 > MC74HC4316N (MOTOROLA INC) Dual Timer; Package: SOP; No of Pins: 14; Container: Rail PDF資料下載
參數(shù)資料
| 型號： | MC74HC4316N |
| 廠商： | MOTOROLA INC |
| 元件分類： | 運(yùn)動(dòng)控制電子 |
| 英文描述： | Dual Timer; Package: SOP; No of Pins: 14; Container: Rail |
| 中文描述： | QUAD 1-CHANNEL, SGL POLE SGL THROW SWITCH, PDIP16 |
| 封裝： | PLASTIC, DIP-16 |
| 文件頁數(shù)： | 7/10頁 |
| 文件大?。?/td> | 347K |
| 代理商： | MC74HC4316N |
MC74HC4316
High–Speed CMOS Logic Data
DL129 — Rev 6
7
MOTOROLA
POSITION
WHEN TESTING tPLZ AND tPZL
Figure 9. Propagation Delay Test Set–Up
ON
16
VCC
*Includes all probe and jig capacitance.
TEST
POINT
ANALOG O/I
ANALOG I/O
50 pF*
SELECTED
CONTROL
INPUT
VCC
Figure 10. Propagation Delay, ON/OFF Control
to Analog Out
ON/OFF
VCC
TEST
POINT
16
VCC
1 k
POSITION
WHEN TESTING tPHZ AND tPZH
50 pF*
1
2
1
2
Figure 11. Propagation Delay Test Set–Up
1
2
Figure 12. Crosstalk Between Any Two Switches,
Test Set–Up (Adjacent Channels Used)
RL
ON
16
*Includes all probe and jig capacitance.
OFF
RL
VIS
fin
0.1
μ
F
Figure 13. Power Dissipation Capacitance
Test Set–Up
16
VCC
N/C
ON/OFF
A
N/C
SELECTED
CONTROL
INPUT
CONTROL
ON
16
VCC
10
μ
F
CL*
fin
RL
TO
DISTORTION
METER
*Includes all probe and jig capacitance.
VOS
VIS
SELECTED
CONTROL
INPUT
VCC
Figure 14. Total Harmonic Distortion, Test Set–Up
7
8
9
*Includes all probe and jig capacitance.
8
9
CONTROL
OR
ENABLE
VCC
7
8
9
VEE
CL*
CL*
RL
SELECTED
CONTROL
INPUT
VCC
TEST
POINT
ANALOG I/O
7
8
9
VEE
7
8
9
VEE
50%
50%
90%
10%
tPZL
tPLZ
tPZH
tPHZ
HIGH
IMPEDANCE
VOL
VOH
HIGH
IMPEDANCE
VCC
GND
50%
ANALOG
OUT
CONTROL
ENABLE
tr
tf
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。