參數(shù)資料
型號: MC74HC4316N
廠商: MOTOROLA INC
元件分類: 運(yùn)動(dòng)控制電子
英文描述: Dual Timer; Package: SOP; No of Pins: 14; Container: Rail
中文描述: QUAD 1-CHANNEL, SGL POLE SGL THROW SWITCH, PDIP16
封裝: PLASTIC, DIP-16
文件頁數(shù): 2/10頁
文件大小: 347K
代理商: MC74HC4316N
MOTOROLA
High–Speed CMOS Logic Data
DL129 — Rev 6
2
to VCC + 0.5
Vin
I
DC Input Voltage (Ref. to GND)
DC Current Into or Out of Any Pin
– 1.5 to VCC + 1.5
±
25
V
mA
PD
Power Dissipation in Still Air
Plastic DIP
mW
750
Functional operation should be restricted to the Recommended Operating Conditions.
Derating — Plastic DIP: – 10 mW/ C from 65 to 125 C
SOIC Package: – 7 mW/ C from 65 to 125 C
For high frequency or heavy load considerations, see Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).
(Control or Enable Inputs)
0
500
be drawn; i.e., the current out of the switch may contain both VCC and switch input components.
The reliability of the device will be unaffected unless the Maximum Ratings are exceeded.
VCC = 4.5 V
Digital Section
Symbol
Parameter
Test Conditions
V
Guaranteed Limit
VCC
– 55 to
25 C
125 C
VIH
Minimum High–Level Voltage,
Ron = Per Spec
2.0
6.0
1.5
4.2
85 C
1.5
4.2
1.5
4.2
Unit
Maximum Low–Level Voltage,
Control or Enable Inputs
2.0
4.5
0.3
0.9
0.3
0.9
0.3
0.9
V
Current, Control or Enable
Inputs
V
ICC
Maximum Quiescent Supply
Vin = VCC or GND
A
NOTE:Information on typical parametric values can be found in Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).
6.0
8
80
160
This device contains protection
circuitry to guard against damage
due to high static voltages or electric
fields. However, precautions must
be taken to avoid applications of any
voltage higher than maximum rated
voltages to this high–impedance cir-
cuit. For proper operation, Vin and
Vout should be constrained to the
range GND (Vin or Vout)
Unused inputs must always be
tied to an appropriate logic voltage
level (e.g., either GND or VCC).
Unused outputs must be left open.
I/O pins must be connected to a
properly terminated line or bus.
VCC.
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