參數(shù)資料
型號(hào): MC74HC242
廠商: Motorola, Inc.
英文描述: Quad 3-State Bus Transceiver
中文描述: 四三態(tài)總線收發(fā)器
文件頁(yè)數(shù): 3/5頁(yè)
文件大?。?/td> 119K
代理商: MC74HC242
MC74HC242
High–Speed CMOS Logic Data
DL129 — Rev 6
3
MOTOROLA
AC CHARACTERISTICS
(CL = 50 pF, Input tr = tf = 6 ns)
V
Guaranteed Limit
Symbol
Parameter
VCC
–55 to 25
°
C
85
°
C
125
°
C
Unit
tPLH,
tPHL
Maximum Propagation Delay, A to B or B to A
(Figures 2 and 4)
2.0
4.5
6.0
100
20
17
125
25
21
150
30
26
ns
tPLZ,
tPHZ
Maximum Propagation Delay, Output Enable to Output A or B
(Figures 3 and 5)
2.0
4.5
6.0
150
30
26
190
38
33
225
45
38
ns
tPZL,
tPZH
Maximum Propagation Delay, Output Enable to Output A or B
(Figures 3 and 5)
2.0
4.5
6.0
150
30
26
190
38
33
225
45
38
ns
tTLH,
tTHL
Maximum Output Transition Time, Any Output
(Figures 2 and 4)
2.0
4.5
6.0
60
12
10
75
15
13
90
18
15
ns
Cin
Cout
Maximum Input Capacitance
10
10
10
pF
Maximum Three–State Output Capacitance (Output in High Impedance
State)
15
15
15
pF
NOTE:For propagation delays with loads other than 50 pF, and information on typical parametric values, see Chapter 2 of the Motorola High–
Speed CMOS Data Book (DL129/D).
CPD
Power Dissipation Capacitance (Per Transceiver)*
* Used to determine the no–load dynamic power consumption: PD = CPD VCC2f + ICC VCC. For load considerations, see Chapter 2 of the
Motorola High–Speed CMOS Data Book (DL129/D).
Typical @ 25
°
C, VCC = 5.0 V
31
pF
PIN DESCRIPTIONS
DATA PORTS
A1–A4 (Pins 3,4,5,6) and B1–B4 (Pins 11,10,9,8)
Data on these pins may be transferred between data
buses. Depending upon the states of the Output Enables,
these pins may be inputs, outputs or open circuits (high–im-
pedance).
CONTROL INPUTS
A–to–B Enable (Pin 1) and B–to–A Enable (Pin 13)
Data on these Output Enables determine both the direc-
tion of the data flow (from A to B or from B to A) and the
states of the outputs (standard or high impedance), accord-
ing to the Function Table.
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