參數(shù)資料
型號(hào)： MC74HC125AFR2
廠商： ON SEMICONDUCTOR
元件分類： 總線收發(fā)器
英文描述： HC/UH SERIES, QUAD 1-BIT DRIVER, TRUE OUTPUT, PDSO14
封裝： EIAJ, SO-14
文件頁(yè)數(shù)： 2/9頁(yè)
文件大小： 171K
代理商： MC74HC125AFR2
MC74HC125A, MC74HC126A
http://onsemi.com
2
LOGIC DIAGRAM
HC125A
ActiveLow Output Enables
HC126A
ActiveHigh Output Enables
Y1
Y2
Y4
3
6
8
11
13
12
10
9
4
5
1
2
A1
OE1
A2
OE2
A3
OE3
A4
OE4
PIN 14 = VCC
PIN 7 = GND
A1
OE1
A2
OE2
A3
OE3
A4
OE4
Y3
Y1
Y2
Y4
Y3
13
12
10
9
4
5
1
23
6
8
11
FUNCTION TABLE
HC125A
Inputs
Output
AOE
Y
HL
H
LL
L
XH
Z
HC126A
Inputs
Output
AOE
Y
HH
H
LH
L
XL
Z
PIN ASSIGNMENT
11
12
13
14
8
9
10
5
4
3
2
1
7
6
OE3
Y4
A4
OE4
VCC
Y3
A3
OE2
Y1
A1
OE1
GND
Y2
A2
MAXIMUM RATINGS
Symbol
Parameter
Value
Unit
VCC
DC Supply Voltage (Referenced to GND)
– 0.5 to + 7.0
V
Vin
DC Input Voltage (Referenced to GND)
– 0.5 to VCC + 0.5
V
Vout
DC Output Voltage (Referenced to GND)
– 0.5 to VCC + 0.5
V
Iin
DC Input Current, per Pin
± 20
mA
Iout
DC Output Current, per Pin
± 35
mA
ICC
DC Supply Current, VCC and GND Pins
± 75
mA
PD
Power Dissipation in Still Air
Plastic DIP
SOIC Package
TSSOP Package
750
500
450
mW
Tstg
Storage Temperature
– 65 to + 150
_C
TL
Lead Temperature, 1 mm from Case for 10 Seconds
(Plastic DIP, SOIC or TSSOP Package)
260
_C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress
ratings only. Functional operation above the Recommended Operating Conditions is not implied.
Extended exposure to stresses above the Recommended Operating Conditions may affect device
reliability.
Derating — Plastic DIP: – 10 mW/_C from 65_ to 125_C
SOIC Package: – 7 mW/_C from 65_ to 125_C
TSSOP Package: – 6.1 mW/_C from 65_ to 125_C
For high frequency or heavy load considerations, see Chapter 2 of the ON Semiconductor HighSpeed CMOS Data Book (DL129/D).
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
Max
Unit
VCC
DC Supply Voltage (Referenced to GND)
2.0
6.0
V
Vin, Vout
DC Input Voltage, Output Voltage
(Referenced to GND)
0
VCC
V
TA
Operating Temperature, All Package Types
– 55
+ 125
_C
tr, tf
Input Rise and Fall Time
VCC = 2.0 V
(Figure 1)
VCC = 4.5 V
VCC = 6.0 V
0
1000
500
400
ns
This device contains protection
circuitry to guard against damage
due to high static voltages or electric
fields. However, precautions must
be taken to avoid applications of any
voltage higher than maximum rated
voltages to this highimpedance cir-
cuit. For proper operation, Vin and
Vout should be constrained to the
range GND v (Vin or Vout) v VCC.
Unused inputs must always be
tied to an appropriate logic voltage
level (e.g., either GND or VCC).
Unused outputs must be left open.
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