MC68H(R)C908JL3 鈥� Rev. 1.1 66 Centra" />
鍙冩暩(sh霉)璩囨枡
鍨嬭櫉锛� MC68HRC908JK3CDW
寤犲晢锛� Freescale Semiconductor
鏂囦欢闋佹暩(sh霉)锛� 178/212闋�
鏂囦欢澶�?銆�?/td> 0K
鎻忚堪锛� IC MCU 4K FLASH 8MHZ SO20
妯�(bi膩o)婧�(zh菙n)鍖呰锛� 38
绯诲垪锛� HC08
鏍稿績铏曠悊鍣細 HC08
鑺珨灏哄锛� 8-浣�
閫熷害锛� 8MHz
澶栧湇瑷�(sh猫)鍌欙細 LED锛孡VD锛孭OR锛孭WM
杓稿叆/杓稿嚭鏁�(sh霉)锛� 15
绋嬪簭瀛樺劜鍣ㄥ閲忥細 4KB锛�4K x 8锛�
绋嬪簭瀛樺劜鍣ㄩ鍨嬶細 闁冨瓨
RAM 瀹归噺锛� 128 x 8
闆诲 - 闆绘簮 (Vcc/Vdd)锛� 2.7 V ~ 3.3 V
鏁�(sh霉)鎿�(j霉)杞�(zhu菐n)鎻涘櫒锛� A/D 12x8b
鎸暕鍣ㄥ瀷锛� 澶栭儴
宸ヤ綔婧害锛� -40°C ~ 85°C
灏佽/澶栨锛� 20-SOIC锛�0.295"锛�7.50mm 瀵級
鍖呰锛� 绠′欢
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Central Processor Unit (CPU)
Technical Data
MC68H(R)C908JL3 鈥� Rev. 1.1
66
Central Processor Unit (CPU)
Freescale Semiconductor
ROR opr
RORA
RORX
ROR opr,X
ROR ,X
ROR opr,SP
Rotate Right through Carry
鈥撯€�
DIR
INH
IX1
IX
SP1
36
46
56
66
76
9E66
dd
ff
4
1
4
3
5
RSP
Reset Stack Pointer
SP
鈫� $FF
鈥撯€撯€� 鈥撯€撯€� INH
9C
1
RTI
Return from Interrupt
SP
鈫� (SP) + 1; Pull (CCR)
SP
鈫� (SP) + 1; Pull (A)
SP
鈫� (SP) + 1; Pull (X)
SP
鈫� (SP) + 1; Pull (PCH)
SP
鈫� (SP) + 1; Pull (PCL)
INH
80
7
RTS
Return from Subroutine
SP
鈫� SP + 1; Pull (PCH)
SP
鈫� SP + 1; Pull (PCL)
鈥撯€撯€� 鈥撯€撯€� INH
81
4
SBC #opr
SBC opr
SBC opr,X
SBC ,X
SBC opr,SP
Subtract with Carry
A
鈫� (A) 鈥� (M) 鈥� (C)
鈥撯€�
IMM
DIR
EXT
IX2
IX1
IX
SP1
SP2
A2
B2
C2
D2
E2
F2
9EE2
9ED2
ii
dd
hh ll
ee ff
ff
ee ff
2
3
4
3
2
4
5
SEC
Set Carry Bit
C
鈫� 1
鈥撯€撯€� 鈥撯€�1 INH
99
1
SEI
Set Interrupt Mask
I
鈫� 1
鈥撯€�1 鈥撯€撯€� INH
9B
2
STA opr
STA opr,X
STA ,X
STA opr,SP
Store A in M
M
鈫� (A)
0鈥撯€�
鈥�
DIR
EXT
IX2
IX1
IX
SP1
SP2
B7
C7
D7
E7
F7
9EE7
9ED7
dd
hh ll
ee ff
ff
ee ff
3
4
3
2
4
5
STHX opr
Store H:X in M
(M:M + 1)
鈫� (H:X)
0 鈥� 鈥�
鈥� DIR
35
dd
4
STOP
Enable IRQ Pin; Stop Oscillator
I
鈫� 0; Stop Oscillator
鈥� 鈥� 0 鈥� 鈥� 鈥� INH
8E
1
STX opr
STX opr,X
STX ,X
STX opr,SP
Store X in M
M
鈫� (X)
0鈥撯€�
鈥�
DIR
EXT
IX2
IX1
IX
SP1
SP2
BF
CF
DF
EF
FF
9EEF
9EDF
dd
hh ll
ee ff
ff
ee ff
3
4
3
2
4
5
Table 6-1. Instruction Set Summary
Source
Form
Operation
Description
Effect on
CCR
Ad
dress
Mode
Op
cod
e
Operan
d
Cyc
les
VH I N Z C
b0
b7
C
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