Wait for time, tPROG
鍙冩暩(sh霉)璩囨枡
鍨嬭櫉(h脿o)锛� MC68HC908QT2CP
寤犲晢锛� Freescale Semiconductor
鏂囦欢闋�(y猫)鏁�(sh霉)锛� 115/184闋�(y猫)
鏂囦欢澶�?銆�?/td> 0K
鎻忚堪锛� IC MCU 1.5K FLASH W/ADC 8-DIP
妯�(bi膩o)婧�(zh菙n)鍖呰锛� 50
绯诲垪锛� HC08
鏍稿績铏曠悊鍣細 HC08
鑺珨灏哄锛� 8-浣�
閫熷害锛� 8MHz
澶栧湇瑷�(sh猫)鍌欙細 LVD锛孭OR锛孭WM
杓稿叆/杓稿嚭鏁�(sh霉)锛� 5
绋嬪簭瀛樺劜(ch菙)鍣ㄥ閲忥細 1.5KB锛�1.5K x 8锛�
绋嬪簭瀛樺劜(ch菙)鍣ㄩ鍨嬶細 闁冨瓨
RAM 瀹归噺锛� 128 x 8
闆诲 - 闆绘簮 (Vcc/Vdd)锛� 2.7 V ~ 5.5 V
鏁�(sh霉)鎿�(j霉)杞�(zhu菐n)鎻涘櫒锛� A/D 4x8b
鎸暕鍣ㄥ瀷锛� 鍏�(n猫i)閮�
宸ヤ綔婧害锛� -40°C ~ 85°C
灏佽/澶栨锛� 8-DIP锛�0.300"锛�7.62mm锛�
鍖呰锛� 绠′欢
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Memory
MC68HC908QY/QT Family Data Sheet, Rev. 6
36
Freescale Semiconductor
8.
Wait for time, tPROG (minimum 30 渭s).
9.
Repeat step 7 and 8 until all desired bytes within the row are programmed.
10.
Clear the PGM bit(1).
11.
Wait for time, tNVH (minimum 5 渭s).
12.
Clear the HVEN bit.
13.
After time, tRCV (typical 1 渭s), the memory can be accessed in read mode again.
NOTE
The COP register at location $FFFF should not be written between
steps 5鈥�12, when the HVEN bit is set. Since this register is located at a
valid FLASH address, unpredictable behavior may occur if this location is
written while HVEN is set.
This program sequence is repeated throughout the memory until all data is programmed.
NOTE
Programming and erasing of FLASH locations cannot be performed by
code being executed from the FLASH memory. While these operations
must be performed in the order shown, other unrelated operations may
occur between the steps. Do not exceed tPROG maximum, see 16.16
2.6.5 FLASH Protection
Due to the ability of the on-board charge pump to erase and program the FLASH memory in the target
application, provision is made to protect blocks of memory from unintentional erase or program operations
due to system malfunction. This protection is done by use of a FLASH block protect register (FLBPR).
The FLBPR determines the range of the FLASH memory which is to be protected. The range of the
protected area starts from a location defined by FLBPR and ends to the bottom of the FLASH memory
($FFFF). When the memory is protected, the HVEN bit cannot be set in either ERASE or PROGRAM
operations.
NOTE
In performing a program or erase operation, the FLASH block protect
register must be read after setting the PGM or ERASE bit and before
asserting the HVEN bit.
When the FLBPR is programmed with all 0 s, the entire memory is protected from being programmed and
erased. When all the bits are erased (all 1鈥檚), the entire memory is accessible for program and erase.
When bits within the FLBPR are programmed, they lock a block of memory. The address ranges are
shown in 2.6.6 FLASH Block Protect Register. Once the FLBPR is programmed with a value other than
$FF, any erase or program of the FLBPR or the protected block of FLASH memory is prohibited. Mass
erase is disabled whenever any block is protected (FLBPR does not equal $FF). The FLBPR itself can be
erased or programmed only with an external voltage, VTST, present on the IRQ pin. This voltage also
allows entry from reset into the monitor mode.
2. The time between each FLASH address change, or the time between the last FLASH address programmed to clearing
PGM bit, must not exceed the maximum programming time, tPROG maximum.
鐩搁棞(gu膩n)PDF璩囨枡
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鍙冩暩(sh霉)鎻忚堪
MC68HC908QT2CPE 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 1.5K FLASH W/ADC RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪(sh铆)閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜(ch菙)鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰�(f膿ng)鏍�:SMD/SMT
MC68HC908QT2MDW 鍒堕€犲晢:Rochester Electronics LLC 鍔熻兘鎻忚堪:1.5K FLASH W/ADC - Bulk
MC68HC908QT2MP 鍒堕€犲晢:Rochester Electronics LLC 鍔熻兘鎻忚堪:- Bulk 鍒堕€犲晢:Motorola Inc 鍔熻兘鎻忚堪: 鍒堕€犲晢:MOTOROLA 鍔熻兘鎻忚堪:
MC68HC908QT2MPE 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 1.5K FLASH W/ADC RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪(sh铆)閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜(ch菙)鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰�(f膿ng)鏍�:SMD/SMT
MC68HC908QT2VDW 鍒堕€犲晢:Rochester Electronics LLC 鍔熻兘鎻忚堪:
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